11d333e69SMichal Simek /* 2*619bc13eSMichal Simek * Copyright (c) 2018, Arm Limited and Contributors. All rights reserved. 31d333e69SMichal Simek * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. 41d333e69SMichal Simek * Copyright (C) 2022, Advanced Micro Devices, Inc. All rights reserved. 51d333e69SMichal Simek * 61d333e69SMichal Simek * SPDX-License-Identifier: BSD-3-Clause 71d333e69SMichal Simek */ 81d333e69SMichal Simek 91d333e69SMichal Simek #include <common/debug.h> 101d333e69SMichal Simek #include <plat/common/platform.h> 111d333e69SMichal Simek 121d333e69SMichal Simek #include <plat_private.h> 131d333e69SMichal Simek #include <platform_def.h> 141d333e69SMichal Simek 151d333e69SMichal Simek static const uint8_t plat_power_domain_tree_desc[] = { 161d333e69SMichal Simek /* Number of root nodes */ 171d333e69SMichal Simek 1, 181d333e69SMichal Simek /* Number of clusters */ 191d333e69SMichal Simek PLATFORM_CLUSTER_COUNT, 201d333e69SMichal Simek /* Number of children for the first cluster node */ 211d333e69SMichal Simek PLATFORM_CORE_COUNT_PER_CLUSTER, 221d333e69SMichal Simek /* Number of children for the second cluster node */ 231d333e69SMichal Simek PLATFORM_CORE_COUNT_PER_CLUSTER, 241d333e69SMichal Simek /* Number of children for the third cluster node */ 251d333e69SMichal Simek PLATFORM_CORE_COUNT_PER_CLUSTER, 261d333e69SMichal Simek /* Number of children for the fourth cluster node */ 271d333e69SMichal Simek PLATFORM_CORE_COUNT_PER_CLUSTER, 281d333e69SMichal Simek }; 291d333e69SMichal Simek 301d333e69SMichal Simek const uint8_t *plat_get_power_domain_tree_desc(void) 311d333e69SMichal Simek { 321d333e69SMichal Simek return plat_power_domain_tree_desc; 331d333e69SMichal Simek } 341d333e69SMichal Simek 351d333e69SMichal Simek /******************************************************************************* 361d333e69SMichal Simek * This function implements a part of the critical interface between the psci 371d333e69SMichal Simek * generic layer and the platform that allows the former to query the platform 381d333e69SMichal Simek * to convert an MPIDR to a unique linear index. An error code (-1) is returned 391d333e69SMichal Simek * in case the MPIDR is invalid. 401d333e69SMichal Simek ******************************************************************************/ 411d333e69SMichal Simek int32_t plat_core_pos_by_mpidr(u_register_t mpidr) 421d333e69SMichal Simek { 431d333e69SMichal Simek uint32_t cluster_id, cpu_id; 441d333e69SMichal Simek 451d333e69SMichal Simek mpidr &= MPIDR_AFFINITY_MASK; 461d333e69SMichal Simek 471d333e69SMichal Simek cluster_id = MPIDR_AFFLVL2_VAL(mpidr); 481d333e69SMichal Simek cpu_id = MPIDR_AFFLVL1_VAL(mpidr); 491d333e69SMichal Simek 501d333e69SMichal Simek if (cluster_id >= PLATFORM_CLUSTER_COUNT) { 511d333e69SMichal Simek return -3; 521d333e69SMichal Simek } 531d333e69SMichal Simek 541d333e69SMichal Simek /* 551d333e69SMichal Simek * Validate cpu_id by checking whether it represents a CPU in 561d333e69SMichal Simek * one of the two clusters present on the platform. 571d333e69SMichal Simek */ 581d333e69SMichal Simek if (cpu_id >= PLATFORM_CORE_COUNT_PER_CLUSTER) { 591d333e69SMichal Simek return -1; 601d333e69SMichal Simek } 611d333e69SMichal Simek 621d333e69SMichal Simek return (cpu_id + (cluster_id * PLATFORM_CORE_COUNT_PER_CLUSTER)); 631d333e69SMichal Simek } 64