1 /* 2 * Copyright (c) 2022, Xilinx, Inc. All rights reserved. 3 * Copyright (c) 2022-2025, Advanced Micro Devices, Inc. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #include <assert.h> 9 10 #include <common/debug.h> 11 #include <lib/mmio.h> 12 #include <lib/psci/psci.h> 13 #include <plat/arm/common/plat_arm.h> 14 #include <plat/common/platform.h> 15 #include <plat_arm.h> 16 17 #include <drivers/delay_timer.h> 18 #include <plat_private.h> 19 #include "pm_api_sys.h" 20 #include "pm_client.h" 21 #include <pm_common.h> 22 #include "pm_ipi.h" 23 #include "pm_svc_main.h" 24 #include "versal_net_def.h" 25 26 static uintptr_t versal_net_sec_entry; 27 28 static int32_t versal_net_pwr_domain_on(u_register_t mpidr) 29 { 30 int32_t cpu_id = plat_core_pos_by_mpidr(mpidr); 31 const struct pm_proc *proc; 32 int32_t ret = PSCI_E_INTERN_FAIL; 33 34 VERBOSE("%s: mpidr: 0x%lx, cpuid: %x\n", 35 __func__, mpidr, cpu_id); 36 37 if (cpu_id == -1) { 38 goto exit_label; 39 } 40 41 proc = pm_get_proc(cpu_id); 42 if (proc == NULL) { 43 goto exit_label; 44 } 45 46 (void)pm_req_wakeup(proc->node_id, (versal_net_sec_entry & 0xFFFFFFFFU) | 0x1U, 47 versal_net_sec_entry >> 32, 0, 0); 48 49 /* Clear power down request */ 50 pm_client_wakeup(proc); 51 52 ret = PSCI_E_SUCCESS; 53 54 exit_label: 55 return ret; 56 } 57 58 /** 59 * versal_net_pwr_domain_off() - This function performs actions to turn off 60 * core. 61 * @target_state: Targeted state. 62 * 63 */ 64 static void versal_net_pwr_domain_off(const psci_power_state_t *target_state) 65 { 66 uint32_t ret, fw_api_version, version_type[RET_PAYLOAD_ARG_CNT] = {0U}; 67 uint32_t cpu_id = plat_my_core_pos(); 68 const struct pm_proc *proc = pm_get_proc(cpu_id); 69 70 if (proc == NULL) { 71 goto exit_label; 72 } 73 74 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) { 75 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", 76 __func__, i, target_state->pwr_domain_state[i]); 77 } 78 79 /* 80 * Send request to PMC to power down the appropriate APU CPU 81 * core. 82 * According to PSCI specification, CPU_off function does not 83 * have resume address and CPU core can only be woken up 84 * invoking CPU_on function, during which resume address will 85 * be set. 86 */ 87 ret = pm_feature_check((uint32_t)PM_SELF_SUSPEND, &version_type[0], SECURE_FLAG); 88 if (ret == (uint32_t)PM_RET_SUCCESS) { 89 fw_api_version = version_type[0] & 0xFFFFU; 90 if (fw_api_version >= 3U) { 91 (void)pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_OFF, 0, 92 SECURE_FLAG); 93 } else { 94 (void)pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_IDLE, 0, 95 SECURE_FLAG); 96 } 97 } 98 99 exit_label: 100 return; 101 } 102 103 static int32_t versal_net_validate_ns_entrypoint(uint64_t ns_entrypoint) 104 { 105 int32_t ret = PSCI_E_SUCCESS; 106 107 if (((ns_entrypoint >= PLAT_DDR_LOWMEM_MAX) && (ns_entrypoint <= PLAT_DDR_HIGHMEM_MAX)) || 108 ((ns_entrypoint >= BL31_BASE) && (ns_entrypoint <= BL31_LIMIT))) { 109 ret = PSCI_E_INVALID_ADDRESS; 110 } 111 112 return ret; 113 } 114 115 /** 116 * versal_net_system_reset_scope() - Sends the reset request to firmware for 117 * the system to reset. 118 * @scope : scope of reset which could be SYSTEM/SUBSYSTEM/PS-ONLY 119 * 120 * Return: 121 * Does not return if system resets, none if there is a failure. 122 */ 123 static void __dead2 versal_net_system_reset_scope(uint32_t scope) 124 { 125 uint32_t ret, timeout = 10000U; 126 127 request_cpu_pwrdwn(); 128 129 /* 130 * Send the system reset request to the firmware if power down request 131 * is not received from firmware. 132 */ 133 if (!pm_pwrdwn_req_status()) { 134 (void)pm_system_shutdown(XPM_SHUTDOWN_TYPE_RESET, 135 scope, SECURE_FLAG); 136 137 /* 138 * Wait for system shutdown request completed and idle callback 139 * not received. 140 */ 141 do { 142 ret = ipi_mb_enquire_status(primary_proc->ipi->local_ipi_id, 143 primary_proc->ipi->remote_ipi_id); 144 udelay(100); 145 timeout--; 146 } while ((ret != IPI_MB_STATUS_RECV_PENDING) && (timeout > 0U)); 147 } 148 149 (void)psci_cpu_off(); 150 151 while (true) { 152 wfi(); 153 } 154 } 155 156 /** 157 * versal_net_system_reset() - This function sends the reset request to firmware 158 * for the system to reset in response to SYSTEM_RESET call 159 * 160 * Return: 161 * Does not return if system resets, none if there is a failure. 162 */ 163 static void __dead2 versal_net_system_reset(void) 164 { 165 /* 166 * Any platform-specific actions for handling a cold reset 167 * should be performed here before invoking 168 * versal_net_system_reset_scope. 169 */ 170 versal_net_system_reset_scope(XPM_SHUTDOWN_SUBTYPE_RST_SUBSYSTEM); 171 } 172 173 /** 174 * versal_net_system_reset2() - Handles warm / vendor-specific system reset 175 * in response to SYSTEM_RESET2 call. 176 * @is_vendor: Flag indicating if this is a vendor-specific reset 177 * @reset_type: Type of reset requested 178 * @cookie: Additional reset data 179 * 180 * This function initiates a controlled system reset by requesting it 181 * through the PM firmware. 182 * 183 * Return: 184 * Does not return if system resets, PSCI_E_INTERN_FAIL 185 * if there is a failure. 186 */ 187 static int versal_net_system_reset2(int is_vendor, int reset_type, u_register_t cookie) 188 { 189 if (is_vendor == 0 && reset_type == PSCI_RESET2_SYSTEM_WARM_RESET) { 190 /* 191 * Any platform-specific actions for handling a warm reset 192 * should be performed here before invoking 193 * versal_net_system_reset_scope. 194 */ 195 versal_net_system_reset_scope(XPM_SHUTDOWN_SUBTYPE_RST_SUBSYSTEM); 196 } else { 197 /* Vendor specific reset */ 198 versal_net_system_reset_scope(pm_get_shutdown_scope()); 199 } 200 201 return PSCI_E_INTERN_FAIL; 202 } 203 204 /** 205 * versal_net_pwr_domain_suspend() - This function sends request to PMC to suspend 206 * core. 207 * @target_state: Targeted state. 208 * 209 */ 210 static void versal_net_pwr_domain_suspend(const psci_power_state_t *target_state) 211 { 212 uint32_t state; 213 uint32_t cpu_id = plat_my_core_pos(); 214 const struct pm_proc *proc = pm_get_proc(cpu_id); 215 216 if (proc == NULL) { 217 goto exit_label; 218 } 219 220 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) { 221 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", 222 __func__, i, target_state->pwr_domain_state[i]); 223 } 224 225 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { 226 gic_save(); 227 } 228 229 state = (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) ? 230 PM_STATE_SUSPEND_TO_RAM : PM_STATE_CPU_IDLE; 231 232 /* Send request to PMC to suspend this core */ 233 (void)pm_self_suspend(proc->node_id, MAX_LATENCY, state, versal_net_sec_entry, 234 SECURE_FLAG); 235 236 /* TODO: disable coherency */ 237 238 exit_label: 239 return; 240 } 241 242 static void versal_net_pwr_domain_on_finish(const psci_power_state_t *target_state) 243 { 244 (void)target_state; 245 } 246 247 /** 248 * versal_net_pwr_domain_suspend_finish() - This function performs actions to finish 249 * suspend procedure. 250 * @target_state: Targeted state. 251 * 252 */ 253 static void versal_net_pwr_domain_suspend_finish(const psci_power_state_t *target_state) 254 { 255 uint32_t cpu_id = plat_my_core_pos(); 256 const struct pm_proc *proc = pm_get_proc(cpu_id); 257 258 if (proc == NULL) { 259 goto exit_label; 260 } 261 262 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) { 263 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", 264 __func__, i, target_state->pwr_domain_state[i]); 265 } 266 267 /* Clear the APU power control register for this cpu */ 268 pm_client_wakeup(proc); 269 270 /* TODO: enable coherency */ 271 272 /* APU was turned off, so restore GIC context */ 273 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { 274 gic_resume(); 275 } 276 277 exit_label: 278 return; 279 } 280 281 /** 282 * versal_net_system_off() - This function sends the system off request 283 * to firmware. This function does not return. 284 * 285 */ 286 static void __dead2 versal_net_system_off(void) 287 { 288 /* Send the power down request to the PMC */ 289 (void)pm_system_shutdown(XPM_SHUTDOWN_TYPE_SHUTDOWN, 290 pm_get_shutdown_scope(), SECURE_FLAG); 291 292 while (true) { 293 wfi(); 294 } 295 } 296 297 /** 298 * versal_net_validate_power_state() - This function ensures that the power state 299 * parameter in request is valid. 300 * @power_state: Power state of core. 301 * @req_state: Requested state. 302 * 303 * Return: Returns status, either PSCI_E_SUCCESS or reason. 304 * 305 */ 306 static int32_t versal_net_validate_power_state(unsigned int power_state, 307 psci_power_state_t *req_state) 308 { 309 int32_t ret = PSCI_E_INVALID_PARAMS; 310 311 VERBOSE("%s: power_state: 0x%x\n", __func__, power_state); 312 313 uint32_t pstate = psci_get_pstate_type(power_state); 314 315 assert(req_state != NULL); 316 317 /* Sanity check the requested state */ 318 if (pstate == PSTATE_TYPE_STANDBY) { 319 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; 320 } else { 321 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; 322 } 323 324 /* We expect the 'state id' to be zero */ 325 if (psci_get_pstate_id(power_state) == 0U) { 326 ret = PSCI_E_SUCCESS; 327 } 328 329 return ret; 330 } 331 332 /** 333 * versal_net_get_sys_suspend_power_state() - Get power state for system 334 * suspend. 335 * @req_state: Requested state. 336 * 337 */ 338 static void versal_net_get_sys_suspend_power_state(psci_power_state_t *req_state) 339 { 340 uint64_t i; 341 342 for (i = MPIDR_AFFLVL0; i <= PLAT_MAX_PWR_LVL; i++) { 343 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; 344 } 345 } 346 347 static const struct plat_psci_ops versal_net_nopmc_psci_ops = { 348 .pwr_domain_on = versal_net_pwr_domain_on, 349 .pwr_domain_off = versal_net_pwr_domain_off, 350 .pwr_domain_on_finish = versal_net_pwr_domain_on_finish, 351 .pwr_domain_suspend = versal_net_pwr_domain_suspend, 352 .pwr_domain_suspend_finish = versal_net_pwr_domain_suspend_finish, 353 .system_off = versal_net_system_off, 354 .system_reset = versal_net_system_reset, 355 .system_reset2 = versal_net_system_reset2, 356 .validate_ns_entrypoint = versal_net_validate_ns_entrypoint, 357 .validate_power_state = versal_net_validate_power_state, 358 .get_sys_suspend_power_state = versal_net_get_sys_suspend_power_state, 359 }; 360 361 /******************************************************************************* 362 * Export the platform specific power ops. 363 ******************************************************************************/ 364 int32_t plat_setup_psci_ops(uintptr_t sec_entrypoint, 365 const struct plat_psci_ops **psci_ops) 366 { 367 versal_net_sec_entry = sec_entrypoint; 368 369 VERBOSE("Setting up entry point %lx\n", versal_net_sec_entry); 370 371 *psci_ops = &versal_net_nopmc_psci_ops; 372 373 return 0; 374 } 375 376 int32_t sip_svc_setup_init(void) 377 { 378 return pm_setup(); 379 } 380 381 uint64_t smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, uint64_t x4, 382 void *cookie, void *handle, uint64_t flags) 383 { 384 return pm_smc_handler(smc_fid, x1, x2, x3, x4, cookie, handle, flags); 385 } 386