1 /* 2 * Copyright (c) 2022, Xilinx, Inc. All rights reserved. 3 * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #include <assert.h> 9 10 #include <common/debug.h> 11 #include <lib/mmio.h> 12 #include <lib/psci/psci.h> 13 #include <plat/arm/common/plat_arm.h> 14 #include <plat/common/platform.h> 15 #include <plat_arm.h> 16 17 #include <drivers/delay_timer.h> 18 #include <plat_private.h> 19 #include "pm_api_sys.h" 20 #include "pm_client.h" 21 #include <pm_common.h> 22 #include "pm_ipi.h" 23 #include "pm_svc_main.h" 24 #include "versal_net_def.h" 25 26 static uintptr_t versal_net_sec_entry; 27 28 static int32_t versal_net_pwr_domain_on(u_register_t mpidr) 29 { 30 uint32_t cpu_id = plat_core_pos_by_mpidr(mpidr); 31 const struct pm_proc *proc; 32 33 VERBOSE("%s: mpidr: 0x%lx, cpuid: %x\n", 34 __func__, mpidr, cpu_id); 35 36 if (cpu_id == -1) { 37 return PSCI_E_INTERN_FAIL; 38 } 39 40 proc = pm_get_proc(cpu_id); 41 if (!proc) { 42 return PSCI_E_INTERN_FAIL; 43 } 44 45 pm_req_wakeup(proc->node_id, (versal_net_sec_entry & 0xFFFFFFFFU) | 0x1U, 46 versal_net_sec_entry >> 32, 0, 0); 47 48 /* Clear power down request */ 49 pm_client_wakeup(proc); 50 51 return PSCI_E_SUCCESS; 52 } 53 54 /** 55 * versal_net_pwr_domain_off() - This function performs actions to turn off 56 * core. 57 * @target_state: Targeted state. 58 * 59 */ 60 static void versal_net_pwr_domain_off(const psci_power_state_t *target_state) 61 { 62 uint32_t ret, fw_api_version, version[PAYLOAD_ARG_CNT] = {0U}; 63 uint32_t cpu_id = plat_my_core_pos(); 64 const struct pm_proc *proc = pm_get_proc(cpu_id); 65 66 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) { 67 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", 68 __func__, i, target_state->pwr_domain_state[i]); 69 } 70 71 /* Prevent interrupts from spuriously waking up this cpu */ 72 plat_arm_gic_cpuif_disable(); 73 74 /* 75 * Send request to PMC to power down the appropriate APU CPU 76 * core. 77 * According to PSCI specification, CPU_off function does not 78 * have resume address and CPU core can only be woken up 79 * invoking CPU_on function, during which resume address will 80 * be set. 81 */ 82 ret = pm_feature_check((uint32_t)PM_SELF_SUSPEND, &version[0], SECURE_FLAG); 83 if (ret == PM_RET_SUCCESS) { 84 fw_api_version = version[0] & 0xFFFFU; 85 if (fw_api_version >= 3U) { 86 (void)pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_OFF, 0, 87 SECURE_FLAG); 88 } else { 89 (void)pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_IDLE, 0, 90 SECURE_FLAG); 91 } 92 } 93 } 94 95 /** 96 * versal_net_system_reset() - This function sends the reset request to firmware 97 * for the system to reset. This function does not 98 * return. 99 * 100 */ 101 static void __dead2 versal_net_system_reset(void) 102 { 103 uint32_t ret, timeout = 10000U; 104 105 request_cpu_pwrdwn(); 106 107 /* 108 * Send the system reset request to the firmware if power down request 109 * is not received from firmware. 110 */ 111 if (!pwrdwn_req_received) { 112 (void)pm_system_shutdown(XPM_SHUTDOWN_TYPE_RESET, 113 pm_get_shutdown_scope(), SECURE_FLAG); 114 115 /* 116 * Wait for system shutdown request completed and idle callback 117 * not received. 118 */ 119 do { 120 ret = ipi_mb_enquire_status(primary_proc->ipi->local_ipi_id, 121 primary_proc->ipi->remote_ipi_id); 122 udelay(100); 123 timeout--; 124 } while ((ret != IPI_MB_STATUS_RECV_PENDING) && (timeout > 0U)); 125 } 126 127 (void)psci_cpu_off(); 128 129 while (1) { 130 wfi(); 131 } 132 } 133 134 /** 135 * versal_net_pwr_domain_suspend() - This function sends request to PMC to suspend 136 * core. 137 * @target_state: Targeted state. 138 * 139 */ 140 static void versal_net_pwr_domain_suspend(const psci_power_state_t *target_state) 141 { 142 uint32_t state; 143 uint32_t cpu_id = plat_my_core_pos(); 144 const struct pm_proc *proc = pm_get_proc(cpu_id); 145 146 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) { 147 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", 148 __func__, i, target_state->pwr_domain_state[i]); 149 } 150 151 plat_arm_gic_cpuif_disable(); 152 153 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { 154 plat_arm_gic_save(); 155 } 156 157 state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ? 158 PM_STATE_SUSPEND_TO_RAM : PM_STATE_CPU_IDLE; 159 160 /* Send request to PMC to suspend this core */ 161 pm_self_suspend(proc->node_id, MAX_LATENCY, state, versal_net_sec_entry, 162 SECURE_FLAG); 163 164 /* TODO: disable coherency */ 165 } 166 167 static void versal_net_pwr_domain_on_finish(const psci_power_state_t *target_state) 168 { 169 (void)target_state; 170 171 /* Enable the gic cpu interface */ 172 plat_arm_gic_pcpu_init(); 173 174 /* Program the gic per-cpu distributor or re-distributor interface */ 175 plat_arm_gic_cpuif_enable(); 176 } 177 178 /** 179 * versal_net_pwr_domain_suspend_finish() - This function performs actions to finish 180 * suspend procedure. 181 * @target_state: Targeted state. 182 * 183 */ 184 static void versal_net_pwr_domain_suspend_finish(const psci_power_state_t *target_state) 185 { 186 uint32_t cpu_id = plat_my_core_pos(); 187 const struct pm_proc *proc = pm_get_proc(cpu_id); 188 189 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) 190 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", 191 __func__, i, target_state->pwr_domain_state[i]); 192 193 /* Clear the APU power control register for this cpu */ 194 pm_client_wakeup(proc); 195 196 /* TODO: enable coherency */ 197 198 /* APU was turned off, so restore GIC context */ 199 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { 200 plat_arm_gic_resume(); 201 } 202 203 plat_arm_gic_cpuif_enable(); 204 } 205 206 /** 207 * versal_net_system_off() - This function sends the system off request 208 * to firmware. This function does not return. 209 * 210 */ 211 static void __dead2 versal_net_system_off(void) 212 { 213 /* Send the power down request to the PMC */ 214 pm_system_shutdown(XPM_SHUTDOWN_TYPE_SHUTDOWN, 215 pm_get_shutdown_scope(), SECURE_FLAG); 216 217 while (1) { 218 wfi(); 219 } 220 } 221 222 /** 223 * versal_net_validate_power_state() - This function ensures that the power state 224 * parameter in request is valid. 225 * @power_state: Power state of core. 226 * @req_state: Requested state. 227 * 228 * Return: Returns status, either PSCI_E_SUCCESS or reason. 229 * 230 */ 231 static int32_t versal_net_validate_power_state(unsigned int power_state, 232 psci_power_state_t *req_state) 233 { 234 VERBOSE("%s: power_state: 0x%x\n", __func__, power_state); 235 236 int32_t pstate = psci_get_pstate_type(power_state); 237 238 assert(req_state); 239 240 /* Sanity check the requested state */ 241 if (pstate == PSTATE_TYPE_STANDBY) { 242 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; 243 } else { 244 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; 245 } 246 247 /* We expect the 'state id' to be zero */ 248 if (psci_get_pstate_id(power_state)) { 249 return PSCI_E_INVALID_PARAMS; 250 } 251 252 return PSCI_E_SUCCESS; 253 } 254 255 /** 256 * versal_net_get_sys_suspend_power_state() - Get power state for system 257 * suspend. 258 * @req_state: Requested state. 259 * 260 */ 261 static void versal_net_get_sys_suspend_power_state(psci_power_state_t *req_state) 262 { 263 uint64_t i; 264 265 for (i = MPIDR_AFFLVL0; i <= PLAT_MAX_PWR_LVL; i++) 266 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; 267 } 268 269 static const struct plat_psci_ops versal_net_nopmc_psci_ops = { 270 .pwr_domain_on = versal_net_pwr_domain_on, 271 .pwr_domain_off = versal_net_pwr_domain_off, 272 .pwr_domain_on_finish = versal_net_pwr_domain_on_finish, 273 .pwr_domain_suspend = versal_net_pwr_domain_suspend, 274 .pwr_domain_suspend_finish = versal_net_pwr_domain_suspend_finish, 275 .system_off = versal_net_system_off, 276 .system_reset = versal_net_system_reset, 277 .validate_power_state = versal_net_validate_power_state, 278 .get_sys_suspend_power_state = versal_net_get_sys_suspend_power_state, 279 }; 280 281 /******************************************************************************* 282 * Export the platform specific power ops. 283 ******************************************************************************/ 284 int32_t plat_setup_psci_ops(uintptr_t sec_entrypoint, 285 const struct plat_psci_ops **psci_ops) 286 { 287 versal_net_sec_entry = sec_entrypoint; 288 289 VERBOSE("Setting up entry point %lx\n", versal_net_sec_entry); 290 291 *psci_ops = &versal_net_nopmc_psci_ops; 292 293 return 0; 294 } 295 296 int32_t sip_svc_setup_init(void) 297 { 298 return pm_setup(); 299 } 300 301 uint64_t smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, uint64_t x4, 302 void *cookie, void *handle, uint64_t flags) 303 { 304 return pm_smc_handler(smc_fid, x1, x2, x3, x4, cookie, handle, flags); 305 } 306