1 /* 2 * Copyright (c) 2022, Xilinx, Inc. All rights reserved. 3 * Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #include <assert.h> 9 10 #include <common/debug.h> 11 #include <lib/mmio.h> 12 #include <lib/psci/psci.h> 13 #include <plat/arm/common/plat_arm.h> 14 #include <plat/common/platform.h> 15 #include <plat_arm.h> 16 17 #include <drivers/delay_timer.h> 18 #include <plat_private.h> 19 #include "pm_api_sys.h" 20 #include "pm_client.h" 21 #include <pm_common.h> 22 #include "pm_ipi.h" 23 #include "pm_svc_main.h" 24 #include "versal_net_def.h" 25 26 static uintptr_t versal_net_sec_entry; 27 28 static int32_t versal_net_pwr_domain_on(u_register_t mpidr) 29 { 30 int32_t cpu_id = plat_core_pos_by_mpidr(mpidr); 31 const struct pm_proc *proc; 32 int32_t ret = PSCI_E_INTERN_FAIL; 33 34 VERBOSE("%s: mpidr: 0x%lx, cpuid: %x\n", 35 __func__, mpidr, cpu_id); 36 37 if (cpu_id == -1) { 38 goto exit_label; 39 } 40 41 proc = pm_get_proc(cpu_id); 42 if (proc == NULL) { 43 goto exit_label; 44 } 45 46 (void)pm_req_wakeup(proc->node_id, (versal_net_sec_entry & 0xFFFFFFFFU) | 0x1U, 47 versal_net_sec_entry >> 32, 0, 0); 48 49 /* Clear power down request */ 50 pm_client_wakeup(proc); 51 52 ret = PSCI_E_SUCCESS; 53 54 exit_label: 55 return ret; 56 } 57 58 /** 59 * versal_net_pwr_domain_off() - This function performs actions to turn off 60 * core. 61 * @target_state: Targeted state. 62 * 63 */ 64 static void versal_net_pwr_domain_off(const psci_power_state_t *target_state) 65 { 66 uint32_t ret, fw_api_version, version_type[RET_PAYLOAD_ARG_CNT] = {0U}; 67 uint32_t cpu_id = plat_my_core_pos(); 68 const struct pm_proc *proc = pm_get_proc(cpu_id); 69 70 if (proc == NULL) { 71 goto exit_label; 72 } 73 74 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) { 75 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", 76 __func__, i, target_state->pwr_domain_state[i]); 77 } 78 79 /* Prevent interrupts from spuriously waking up this cpu */ 80 plat_arm_gic_cpuif_disable(); 81 82 /* 83 * Send request to PMC to power down the appropriate APU CPU 84 * core. 85 * According to PSCI specification, CPU_off function does not 86 * have resume address and CPU core can only be woken up 87 * invoking CPU_on function, during which resume address will 88 * be set. 89 */ 90 ret = pm_feature_check((uint32_t)PM_SELF_SUSPEND, &version_type[0], SECURE_FLAG); 91 if (ret == (uint32_t)PM_RET_SUCCESS) { 92 fw_api_version = version_type[0] & 0xFFFFU; 93 if (fw_api_version >= 3U) { 94 (void)pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_OFF, 0, 95 SECURE_FLAG); 96 } else { 97 (void)pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_IDLE, 0, 98 SECURE_FLAG); 99 } 100 } 101 102 exit_label: 103 return; 104 } 105 106 /** 107 * versal_net_system_reset() - This function sends the reset request to firmware 108 * for the system to reset. This function does not 109 * return. 110 * 111 */ 112 static void __dead2 versal_net_system_reset(void) 113 { 114 uint32_t ret, timeout = 10000U; 115 116 request_cpu_pwrdwn(); 117 118 /* 119 * Send the system reset request to the firmware if power down request 120 * is not received from firmware. 121 */ 122 if (!pwrdwn_req_received) { 123 (void)pm_system_shutdown(XPM_SHUTDOWN_TYPE_RESET, 124 pm_get_shutdown_scope(), SECURE_FLAG); 125 126 /* 127 * Wait for system shutdown request completed and idle callback 128 * not received. 129 */ 130 do { 131 ret = ipi_mb_enquire_status(primary_proc->ipi->local_ipi_id, 132 primary_proc->ipi->remote_ipi_id); 133 udelay(100); 134 timeout--; 135 } while ((ret != IPI_MB_STATUS_RECV_PENDING) && (timeout > 0U)); 136 } 137 138 (void)psci_cpu_off(); 139 140 while (true) { 141 wfi(); 142 } 143 } 144 145 /** 146 * versal_net_pwr_domain_suspend() - This function sends request to PMC to suspend 147 * core. 148 * @target_state: Targeted state. 149 * 150 */ 151 static void versal_net_pwr_domain_suspend(const psci_power_state_t *target_state) 152 { 153 uint32_t state; 154 uint32_t cpu_id = plat_my_core_pos(); 155 const struct pm_proc *proc = pm_get_proc(cpu_id); 156 157 if (proc == NULL) { 158 goto exit_label; 159 } 160 161 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) { 162 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", 163 __func__, i, target_state->pwr_domain_state[i]); 164 } 165 166 plat_arm_gic_cpuif_disable(); 167 168 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { 169 plat_arm_gic_save(); 170 } 171 172 state = (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) ? 173 PM_STATE_SUSPEND_TO_RAM : PM_STATE_CPU_IDLE; 174 175 /* Send request to PMC to suspend this core */ 176 (void)pm_self_suspend(proc->node_id, MAX_LATENCY, state, versal_net_sec_entry, 177 SECURE_FLAG); 178 179 /* TODO: disable coherency */ 180 181 exit_label: 182 return; 183 } 184 185 static void versal_net_pwr_domain_on_finish(const psci_power_state_t *target_state) 186 { 187 (void)target_state; 188 189 /* Enable the gic cpu interface */ 190 plat_arm_gic_pcpu_init(); 191 192 /* Program the gic per-cpu distributor or re-distributor interface */ 193 plat_arm_gic_cpuif_enable(); 194 } 195 196 /** 197 * versal_net_pwr_domain_suspend_finish() - This function performs actions to finish 198 * suspend procedure. 199 * @target_state: Targeted state. 200 * 201 */ 202 static void versal_net_pwr_domain_suspend_finish(const psci_power_state_t *target_state) 203 { 204 uint32_t cpu_id = plat_my_core_pos(); 205 const struct pm_proc *proc = pm_get_proc(cpu_id); 206 207 if (proc == NULL) { 208 goto exit_label; 209 } 210 211 for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) { 212 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", 213 __func__, i, target_state->pwr_domain_state[i]); 214 } 215 216 /* Clear the APU power control register for this cpu */ 217 pm_client_wakeup(proc); 218 219 /* TODO: enable coherency */ 220 221 /* APU was turned off, so restore GIC context */ 222 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { 223 plat_arm_gic_resume(); 224 } 225 226 plat_arm_gic_cpuif_enable(); 227 228 exit_label: 229 return; 230 } 231 232 /** 233 * versal_net_system_off() - This function sends the system off request 234 * to firmware. This function does not return. 235 * 236 */ 237 static void __dead2 versal_net_system_off(void) 238 { 239 /* Send the power down request to the PMC */ 240 (void)pm_system_shutdown(XPM_SHUTDOWN_TYPE_SHUTDOWN, 241 pm_get_shutdown_scope(), SECURE_FLAG); 242 243 while (true) { 244 wfi(); 245 } 246 } 247 248 /** 249 * versal_net_validate_power_state() - This function ensures that the power state 250 * parameter in request is valid. 251 * @power_state: Power state of core. 252 * @req_state: Requested state. 253 * 254 * Return: Returns status, either PSCI_E_SUCCESS or reason. 255 * 256 */ 257 static int32_t versal_net_validate_power_state(unsigned int power_state, 258 psci_power_state_t *req_state) 259 { 260 int32_t ret = PSCI_E_INVALID_PARAMS; 261 262 VERBOSE("%s: power_state: 0x%x\n", __func__, power_state); 263 264 uint32_t pstate = psci_get_pstate_type(power_state); 265 266 assert(req_state != NULL); 267 268 /* Sanity check the requested state */ 269 if (pstate == PSTATE_TYPE_STANDBY) { 270 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; 271 } else { 272 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; 273 } 274 275 /* We expect the 'state id' to be zero */ 276 if (psci_get_pstate_id(power_state) == 0U) { 277 ret = PSCI_E_SUCCESS; 278 } 279 280 return ret; 281 } 282 283 /** 284 * versal_net_get_sys_suspend_power_state() - Get power state for system 285 * suspend. 286 * @req_state: Requested state. 287 * 288 */ 289 static void versal_net_get_sys_suspend_power_state(psci_power_state_t *req_state) 290 { 291 uint64_t i; 292 293 for (i = MPIDR_AFFLVL0; i <= PLAT_MAX_PWR_LVL; i++) { 294 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; 295 } 296 } 297 298 static const struct plat_psci_ops versal_net_nopmc_psci_ops = { 299 .pwr_domain_on = versal_net_pwr_domain_on, 300 .pwr_domain_off = versal_net_pwr_domain_off, 301 .pwr_domain_on_finish = versal_net_pwr_domain_on_finish, 302 .pwr_domain_suspend = versal_net_pwr_domain_suspend, 303 .pwr_domain_suspend_finish = versal_net_pwr_domain_suspend_finish, 304 .system_off = versal_net_system_off, 305 .system_reset = versal_net_system_reset, 306 .validate_power_state = versal_net_validate_power_state, 307 .get_sys_suspend_power_state = versal_net_get_sys_suspend_power_state, 308 }; 309 310 /******************************************************************************* 311 * Export the platform specific power ops. 312 ******************************************************************************/ 313 int32_t plat_setup_psci_ops(uintptr_t sec_entrypoint, 314 const struct plat_psci_ops **psci_ops) 315 { 316 versal_net_sec_entry = sec_entrypoint; 317 318 VERBOSE("Setting up entry point %lx\n", versal_net_sec_entry); 319 320 *psci_ops = &versal_net_nopmc_psci_ops; 321 322 return 0; 323 } 324 325 int32_t sip_svc_setup_init(void) 326 { 327 return pm_setup(); 328 } 329 330 uint64_t smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, uint64_t x4, 331 void *cookie, void *handle, uint64_t flags) 332 { 333 return pm_smc_handler(smc_fid, x1, x2, x3, x4, cookie, handle, flags); 334 } 335