xref: /rk3399_ARM-atf/plat/xilinx/versal_net/include/plat_ipi.h (revision c0ae04ad4e11e32e6ae78d1a67a0664168a9189b)
10bf622deSMichal Simek /*
20bf622deSMichal Simek  * Copyright (c) 2022, Xilinx, Inc. All rights reserved.
3bfd06265SMichal Simek  * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
40bf622deSMichal Simek  *
50bf622deSMichal Simek  * SPDX-License-Identifier: BSD-3-Clause
60bf622deSMichal Simek  */
70bf622deSMichal Simek 
80bf622deSMichal Simek /* Versal IPI management enums and defines */
90bf622deSMichal Simek 
100bf622deSMichal Simek #ifndef PLAT_IPI_H
110bf622deSMichal Simek #define PLAT_IPI_H
120bf622deSMichal Simek 
130bf622deSMichal Simek #include <stdint.h>
140bf622deSMichal Simek 
150bf622deSMichal Simek #include <ipi.h>
160bf622deSMichal Simek 
170bf622deSMichal Simek /*********************************************************************
180bf622deSMichal Simek  * IPI agent IDs macros
190bf622deSMichal Simek  ********************************************************************/
200bf622deSMichal Simek #define IPI_ID_PMC	1U
210bf622deSMichal Simek #define IPI_ID_APU	2U
220bf622deSMichal Simek #define IPI_ID_RPU0	3U
230bf622deSMichal Simek #define IPI_ID_RPU1	4U
240bf622deSMichal Simek #define IPI_ID_3	5U
250bf622deSMichal Simek #define IPI_ID_4	6U
260bf622deSMichal Simek #define IPI_ID_5	7U
27*511e4a48SBen Levinsky #define IPI_ID_PMC_NOBUF	8U
28*511e4a48SBen Levinsky #define IPI_ID_6_NOBUF_95	9U
29*511e4a48SBen Levinsky #define IPI_ID_1_NOBUF	10U
30*511e4a48SBen Levinsky #define IPI_ID_2_NOBUF	11U
31*511e4a48SBen Levinsky #define IPI_ID_3_NOBUF	12U
32*511e4a48SBen Levinsky #define IPI_ID_4_NOBUF	13U
33*511e4a48SBen Levinsky #define IPI_ID_5_NOBUF	14U
34*511e4a48SBen Levinsky #define IPI_ID_6_NOBUF_101	15U
35*511e4a48SBen Levinsky #define IPI_ID_MAX	16U
360bf622deSMichal Simek 
370bf622deSMichal Simek /*********************************************************************
380bf622deSMichal Simek  * IPI message buffers
390bf622deSMichal Simek  ********************************************************************/
400bf622deSMichal Simek #define IPI_BUFFER_BASEADDR	(0xEB3F0000U)
410bf622deSMichal Simek 
42068b0bc6SMichal Simek #define IPI_LOCAL_ID		IPI_ID_APU
43068b0bc6SMichal Simek #define IPI_REMOTE_ID		IPI_ID_PMC
44068b0bc6SMichal Simek 
4569a5bee4SMichal Simek #define IPI_BUFFER_LOCAL_BASE	(IPI_BUFFER_BASEADDR + (IPI_LOCAL_ID * 0x200U))
4669a5bee4SMichal Simek #define IPI_BUFFER_REMOTE_BASE	(IPI_BUFFER_BASEADDR + (IPI_REMOTE_ID * 0x200U))
470bf622deSMichal Simek 
4869a5bee4SMichal Simek #define IPI_BUFFER_TARGET_LOCAL_OFFSET	(IPI_LOCAL_ID * 0x40U)
4969a5bee4SMichal Simek #define IPI_BUFFER_TARGET_REMOTE_OFFSET	(IPI_REMOTE_ID * 0x40U)
500bf622deSMichal Simek 
510bf622deSMichal Simek #define IPI_BUFFER_MAX_WORDS	8
520bf622deSMichal Simek 
530bf622deSMichal Simek #define IPI_BUFFER_REQ_OFFSET	0x0U
540bf622deSMichal Simek #define IPI_BUFFER_RESP_OFFSET	0x20U
550bf622deSMichal Simek 
560bf622deSMichal Simek /*********************************************************************
570bf622deSMichal Simek  * Platform specific IPI API declarations
580bf622deSMichal Simek  ********************************************************************/
590bf622deSMichal Simek 
600bf622deSMichal Simek /* Configure IPI table for versal_net */
610bf622deSMichal Simek void versal_net_ipi_config_table_init(void);
620bf622deSMichal Simek 
63b2258ce3SMichal Simek /*******************************************************************************
64b2258ce3SMichal Simek  * IPI registers and bitfields
65b2258ce3SMichal Simek  ******************************************************************************/
66b2258ce3SMichal Simek #define IPI0_REG_BASE		(0xEB330000U)
67b2258ce3SMichal Simek #define IPI0_TRIG_BIT		(1 << 2)
68b2258ce3SMichal Simek #define PMC_IPI_TRIG_BIT	(1 << 1)
69b2258ce3SMichal Simek #define IPI1_REG_BASE		(0xEB340000U)
70b2258ce3SMichal Simek #define IPI1_TRIG_BIT		(1 << 3)
71b2258ce3SMichal Simek #define IPI2_REG_BASE		(0xEB350000U)
72b2258ce3SMichal Simek #define IPI2_TRIG_BIT		(1 << 4)
73b2258ce3SMichal Simek #define IPI3_REG_BASE		(0xEB360000U)
74b2258ce3SMichal Simek #define IPI3_TRIG_BIT		(1 << 5)
75b2258ce3SMichal Simek #define IPI4_REG_BASE		(0xEB370000U)
76b2258ce3SMichal Simek #define IPI4_TRIG_BIT		(1 << 6)
77b2258ce3SMichal Simek #define IPI5_REG_BASE		(0xEB380000U)
78b2258ce3SMichal Simek #define IPI5_TRIG_BIT		(1 << 7)
79*511e4a48SBen Levinsky #define PMC_NOBUF_REG_BASE	(0xEB390000U)
80*511e4a48SBen Levinsky #define PMC_NOBUF_TRIG_BIT	(1 << 8)
81*511e4a48SBen Levinsky #define IPI6_NOBUF_95_REG_BASE	(0xEB3A0000U)
82*511e4a48SBen Levinsky #define IPI6_NOBUF_95_TRIG_BIT	(1 << 9)
83*511e4a48SBen Levinsky #define IPI1_NOBUF_REG_BASE	(0xEB3B0000U)
84*511e4a48SBen Levinsky #define IPI1_NOBUF_TRIG_BIT	(1 << 10)
85*511e4a48SBen Levinsky #define IPI2_NOBUF_REG_BASE	(0xEB3B1000U)
86*511e4a48SBen Levinsky #define IPI2_NOBUF_TRIG_BIT	(1 << 11)
87*511e4a48SBen Levinsky #define IPI3_NOBUF_REG_BASE	(0xEB3B2000U)
88*511e4a48SBen Levinsky #define IPI3_NOBUF_TRIG_BIT	(1 << 12)
89*511e4a48SBen Levinsky #define IPI4_NOBUF_REG_BASE	(0xEB3B3000U)
90*511e4a48SBen Levinsky #define IPI4_NOBUF_TRIG_BIT	(1 << 13)
91*511e4a48SBen Levinsky #define IPI5_NOBUF_REG_BASE	(0xEB3B4000U)
92*511e4a48SBen Levinsky #define IPI5_NOBUF_TRIG_BIT	(1 << 14)
93*511e4a48SBen Levinsky #define IPI6_NOBUF_101_REG_BASE	(0xEB3B5000U)
94*511e4a48SBen Levinsky #define IPI6_NOBUF_101_TRIG_BIT	(1 << 15)
95b2258ce3SMichal Simek 
960bf622deSMichal Simek #endif /* PLAT_IPI_H */
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