1 /* 2 * Copyright (c) 2019-2021, Xilinx, Inc. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 /* 8 * APU specific definition of processors in the subsystem as well as functions 9 * for getting information about and changing state of the APU. 10 */ 11 12 #include <assert.h> 13 #include <plat_ipi.h> 14 #include <platform_def.h> 15 #include <versal_def.h> 16 #include <lib/bakery_lock.h> 17 #include <lib/mmio.h> 18 #include <lib/utils.h> 19 #include <drivers/arm/gicv3.h> 20 #include <drivers/arm/gic_common.h> 21 #include <plat/common/platform.h> 22 #include "pm_api_sys.h" 23 #include "pm_client.h" 24 25 #define UNDEFINED_CPUID (~0) 26 #define IRQ_MAX 142U 27 #define NUM_GICD_ISENABLER ((IRQ_MAX >> 5U) + 1U) 28 29 DEFINE_BAKERY_LOCK(pm_client_secure_lock); 30 31 static const struct pm_ipi apu_ipi = { 32 .local_ipi_id = IPI_ID_APU, 33 .remote_ipi_id = IPI_ID_PMC, 34 .buffer_base = IPI_BUFFER_APU_BASE, 35 }; 36 37 /* Order in pm_procs_all array must match cpu ids */ 38 static const struct pm_proc pm_procs_all[] = { 39 { 40 .node_id = XPM_DEVID_ACPU_0, 41 .ipi = &apu_ipi, 42 .pwrdn_mask = APU_0_PWRCTL_CPUPWRDWNREQ_MASK, 43 }, 44 { 45 .node_id = XPM_DEVID_ACPU_1, 46 .ipi = &apu_ipi, 47 .pwrdn_mask = APU_1_PWRCTL_CPUPWRDWNREQ_MASK, 48 } 49 }; 50 51 const struct pm_proc *primary_proc = &pm_procs_all[0]; 52 53 /* Interrupt to PM node index map */ 54 static enum pm_device_node_idx irq_node_map[IRQ_MAX + 1] = { 55 [13] = XPM_NODEIDX_DEV_GPIO, 56 [14] = XPM_NODEIDX_DEV_I2C_0, 57 [15] = XPM_NODEIDX_DEV_I2C_1, 58 [16] = XPM_NODEIDX_DEV_SPI_0, 59 [17] = XPM_NODEIDX_DEV_SPI_1, 60 [18] = XPM_NODEIDX_DEV_UART_0, 61 [19] = XPM_NODEIDX_DEV_UART_1, 62 [20] = XPM_NODEIDX_DEV_CAN_FD_0, 63 [21] = XPM_NODEIDX_DEV_CAN_FD_1, 64 [22] = XPM_NODEIDX_DEV_USB_0, 65 [23] = XPM_NODEIDX_DEV_USB_0, 66 [24] = XPM_NODEIDX_DEV_USB_0, 67 [25] = XPM_NODEIDX_DEV_USB_0, 68 [26] = XPM_NODEIDX_DEV_USB_0, 69 [37] = XPM_NODEIDX_DEV_TTC_0, 70 [38] = XPM_NODEIDX_DEV_TTC_0, 71 [39] = XPM_NODEIDX_DEV_TTC_0, 72 [40] = XPM_NODEIDX_DEV_TTC_1, 73 [41] = XPM_NODEIDX_DEV_TTC_1, 74 [42] = XPM_NODEIDX_DEV_TTC_1, 75 [43] = XPM_NODEIDX_DEV_TTC_2, 76 [44] = XPM_NODEIDX_DEV_TTC_2, 77 [45] = XPM_NODEIDX_DEV_TTC_2, 78 [46] = XPM_NODEIDX_DEV_TTC_3, 79 [47] = XPM_NODEIDX_DEV_TTC_3, 80 [48] = XPM_NODEIDX_DEV_TTC_3, 81 [56] = XPM_NODEIDX_DEV_GEM_0, 82 [57] = XPM_NODEIDX_DEV_GEM_0, 83 [58] = XPM_NODEIDX_DEV_GEM_1, 84 [59] = XPM_NODEIDX_DEV_GEM_1, 85 [60] = XPM_NODEIDX_DEV_ADMA_0, 86 [61] = XPM_NODEIDX_DEV_ADMA_1, 87 [62] = XPM_NODEIDX_DEV_ADMA_2, 88 [63] = XPM_NODEIDX_DEV_ADMA_3, 89 [64] = XPM_NODEIDX_DEV_ADMA_4, 90 [65] = XPM_NODEIDX_DEV_ADMA_5, 91 [66] = XPM_NODEIDX_DEV_ADMA_6, 92 [67] = XPM_NODEIDX_DEV_ADMA_7, 93 [74] = XPM_NODEIDX_DEV_USB_0, 94 [126] = XPM_NODEIDX_DEV_SDIO_0, 95 [127] = XPM_NODEIDX_DEV_SDIO_0, 96 [128] = XPM_NODEIDX_DEV_SDIO_1, 97 [129] = XPM_NODEIDX_DEV_SDIO_1, 98 [142] = XPM_NODEIDX_DEV_RTC, 99 }; 100 101 /** 102 * irq_to_pm_node_idx - Get PM node index corresponding to the interrupt number 103 * @irq: Interrupt number 104 * 105 * Return: PM node index corresponding to the specified interrupt 106 */ 107 static enum pm_device_node_idx irq_to_pm_node_idx(unsigned int irq) 108 { 109 assert(irq <= IRQ_MAX); 110 return irq_node_map[irq]; 111 } 112 113 /** 114 * pm_client_set_wakeup_sources - Set all devices with enabled interrupts as 115 * wake sources in the LibPM. 116 * @node_id: Node id of processor 117 */ 118 static void pm_client_set_wakeup_sources(uint32_t node_id) 119 { 120 uint32_t reg_num; 121 uint32_t device_id; 122 uint8_t pm_wakeup_nodes_set[XPM_NODEIDX_DEV_MAX]; 123 uintptr_t isenabler1 = PLAT_VERSAL_GICD_BASE + GICD_ISENABLER + 4; 124 125 zeromem(&pm_wakeup_nodes_set, (u_register_t)sizeof(pm_wakeup_nodes_set)); 126 127 for (reg_num = 0U; reg_num < NUM_GICD_ISENABLER; reg_num++) { 128 uint32_t base_irq = reg_num << ISENABLER_SHIFT; 129 uint32_t reg = mmio_read_32(isenabler1 + (reg_num << 2)); 130 131 if (reg == 0U) { 132 continue; 133 } 134 135 while (reg != 0U) { 136 enum pm_device_node_idx node_idx; 137 uint32_t idx, irq, lowest_set = reg & (-reg); 138 enum pm_ret_status ret; 139 idx = __builtin_ctz(lowest_set); 140 irq = base_irq + idx; 141 142 if (irq > IRQ_MAX) { 143 break; 144 } 145 146 node_idx = irq_to_pm_node_idx(irq); 147 reg &= ~lowest_set; 148 149 if ((node_idx != XPM_NODEIDX_DEV_MIN) && 150 (pm_wakeup_nodes_set[node_idx] == 0U)) { 151 /* Get device ID from node index */ 152 device_id = PERIPH_DEVID(node_idx); 153 ret = pm_set_wakeup_source(node_id, 154 device_id, 1, 155 SECURE_FLAG); 156 pm_wakeup_nodes_set[node_idx] = (uint8_t)(!ret); 157 } 158 } 159 } 160 } 161 162 /** 163 * pm_client_suspend() - Client-specific suspend actions 164 * 165 * This function should contain any PU-specific actions 166 * required prior to sending suspend request to PMU 167 * Actions taken depend on the state system is suspending to. 168 */ 169 void pm_client_suspend(const struct pm_proc *proc, unsigned int state) 170 { 171 bakery_lock_get(&pm_client_secure_lock); 172 173 if (state == PM_STATE_SUSPEND_TO_RAM) { 174 pm_client_set_wakeup_sources((uint32_t)proc->node_id); 175 } 176 177 /* Set powerdown request */ 178 mmio_write_32(FPD_APU_PWRCTL, mmio_read_32(FPD_APU_PWRCTL) | 179 (uint32_t)proc->pwrdn_mask); 180 181 bakery_lock_release(&pm_client_secure_lock); 182 } 183 184 /** 185 * pm_client_abort_suspend() - Client-specific abort-suspend actions 186 * 187 * This function should contain any PU-specific actions 188 * required for aborting a prior suspend request 189 */ 190 void pm_client_abort_suspend(void) 191 { 192 /* Enable interrupts at processor level (for current cpu) */ 193 gicv3_cpuif_enable(plat_my_core_pos()); 194 195 bakery_lock_get(&pm_client_secure_lock); 196 197 /* Clear powerdown request */ 198 mmio_write_32(FPD_APU_PWRCTL, mmio_read_32(FPD_APU_PWRCTL) & 199 ~((uint32_t)primary_proc->pwrdn_mask)); 200 201 bakery_lock_release(&pm_client_secure_lock); 202 } 203 204 /** 205 * pm_get_cpuid() - get the local cpu ID for a global node ID 206 * @nid: node id of the processor 207 * 208 * Return: the cpu ID (starting from 0) for the subsystem 209 */ 210 static unsigned int pm_get_cpuid(uint32_t nid) 211 { 212 for (size_t i = 0U; i < ARRAY_SIZE(pm_procs_all); i++) { 213 if (pm_procs_all[i].node_id == nid) { 214 return i; 215 } 216 } 217 return UNDEFINED_CPUID; 218 } 219 220 /** 221 * pm_client_wakeup() - Client-specific wakeup actions 222 * 223 * This function should contain any PU-specific actions 224 * required for waking up another APU core 225 */ 226 void pm_client_wakeup(const struct pm_proc *proc) 227 { 228 unsigned int cpuid = pm_get_cpuid(proc->node_id); 229 230 if (cpuid == UNDEFINED_CPUID) { 231 return; 232 } 233 234 bakery_lock_get(&pm_client_secure_lock); 235 236 /* clear powerdown bit for affected cpu */ 237 uint32_t val = mmio_read_32(FPD_APU_PWRCTL); 238 val &= ~(proc->pwrdn_mask); 239 mmio_write_32(FPD_APU_PWRCTL, val); 240 241 bakery_lock_release(&pm_client_secure_lock); 242 } 243 244 /** 245 * pm_get_proc() - returns pointer to the proc structure 246 * @cpuid: id of the cpu whose proc struct pointer should be returned 247 * 248 * Return: pointer to a proc structure if proc is found, otherwise NULL 249 */ 250 const struct pm_proc *pm_get_proc(unsigned int cpuid) 251 { 252 if (cpuid < ARRAY_SIZE(pm_procs_all)) { 253 return &pm_procs_all[cpuid]; 254 } 255 256 return NULL; 257 } 258