1# Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved. 2# Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5 6override PROGRAMMABLE_RESET_ADDRESS := 1 7PSCI_EXTENDED_STATE_ID := 1 8A53_DISABLE_NON_TEMPORAL_HINT := 0 9SEPARATE_CODE_AND_RODATA := 1 10override RESET_TO_BL31 := 1 11PL011_GENERIC_UART := 1 12IPI_CRC_CHECK := 0 13HARDEN_SLS_ALL := 0 14 15# A72 Erratum for SoC 16ERRATA_A72_859971 := 1 17ERRATA_A72_1319367 := 1 18 19ifdef VERSAL_ATF_MEM_BASE 20 $(eval $(call add_define,VERSAL_ATF_MEM_BASE)) 21 22 ifndef VERSAL_ATF_MEM_SIZE 23 $(error "VERSAL_ATF_BASE defined without VERSAL_ATF_SIZE") 24 endif 25 $(eval $(call add_define,VERSAL_ATF_MEM_SIZE)) 26 27 ifdef VERSAL_ATF_MEM_PROGBITS_SIZE 28 $(eval $(call add_define,VERSAL_ATF_MEM_PROGBITS_SIZE)) 29 endif 30endif 31 32ifdef VERSAL_BL32_MEM_BASE 33 $(eval $(call add_define,VERSAL_BL32_MEM_BASE)) 34 35 ifndef VERSAL_BL32_MEM_SIZE 36 $(error "VERSAL_BL32_BASE defined without VERSAL_BL32_SIZE") 37 endif 38 $(eval $(call add_define,VERSAL_BL32_MEM_SIZE)) 39endif 40 41ifdef IPI_CRC_CHECK 42 $(eval $(call add_define,IPI_CRC_CHECK)) 43endif 44 45VERSAL_PLATFORM ?= silicon 46$(eval $(call add_define_val,VERSAL_PLATFORM,VERSAL_PLATFORM_ID_${VERSAL_PLATFORM})) 47 48ifdef XILINX_OF_BOARD_DTB_ADDR 49$(eval $(call add_define,XILINX_OF_BOARD_DTB_ADDR)) 50endif 51 52PLAT_INCLUDES := -Iinclude/plat/arm/common/ \ 53 -Iplat/xilinx/common/include/ \ 54 -Iplat/xilinx/common/ipi_mailbox_service/ \ 55 -Iplat/xilinx/versal/include/ \ 56 -Iplat/xilinx/versal/pm_service/ 57 58include lib/libfdt/libfdt.mk 59# Include GICv3 driver files 60include drivers/arm/gic/v3/gicv3.mk 61include lib/xlat_tables_v2/xlat_tables.mk 62 63PLAT_BL_COMMON_SOURCES := drivers/arm/dcc/dcc_console.c \ 64 drivers/delay_timer/delay_timer.c \ 65 drivers/delay_timer/generic_delay_timer.c \ 66 ${GICV3_SOURCES} \ 67 drivers/arm/pl011/aarch64/pl011_console.S \ 68 plat/common/aarch64/crash_console_helpers.S \ 69 plat/arm/common/arm_cci.c \ 70 plat/arm/common/arm_common.c \ 71 plat/common/plat_gicv3.c \ 72 plat/xilinx/versal/aarch64/versal_helpers.S \ 73 plat/xilinx/versal/aarch64/versal_common.c \ 74 ${XLAT_TABLES_LIB_SRCS} 75 76VERSAL_CONSOLE ?= pl011 77ifeq (${VERSAL_CONSOLE}, $(filter ${VERSAL_CONSOLE},pl011 pl011_0 pl011_1 dcc)) 78else 79 $(error "Please define VERSAL_CONSOLE") 80endif 81 82$(eval $(call add_define_val,VERSAL_CONSOLE,VERSAL_CONSOLE_ID_${VERSAL_CONSOLE})) 83 84BL31_SOURCES += drivers/arm/cci/cci.c \ 85 lib/cpus/aarch64/cortex_a72.S \ 86 plat/common/plat_psci_common.c \ 87 plat/xilinx/common/ipi.c \ 88 plat/xilinx/common/plat_fdt.c \ 89 plat/xilinx/common/plat_startup.c \ 90 plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \ 91 plat/xilinx/common/pm_service/pm_ipi.c \ 92 plat/xilinx/common/pm_service/pm_api_sys.c \ 93 plat/xilinx/common/pm_service/pm_svc_main.c \ 94 plat/xilinx/common/versal.c \ 95 plat/xilinx/versal/bl31_versal_setup.c \ 96 plat/xilinx/versal/plat_psci.c \ 97 plat/xilinx/versal/plat_versal.c \ 98 plat/xilinx/versal/plat_topology.c \ 99 plat/xilinx/versal/sip_svc_setup.c \ 100 plat/xilinx/versal/versal_gicv3.c \ 101 plat/xilinx/versal/versal_ipi.c \ 102 plat/xilinx/versal/pm_service/pm_client.c \ 103 common/fdt_fixup.c \ 104 ${LIBFDT_SRCS} 105 106ifeq ($(HARDEN_SLS_ALL), 1) 107TF_CFLAGS_aarch64 += -mharden-sls=all 108endif 109