xref: /rk3399_ARM-atf/plat/xilinx/versal/platform.mk (revision 9a905a7d86867bab8a5d9befd40a67a6ab9aaea2) 
1# Copyright (c) 2018-2021, ARM Limited and Contributors. All rights reserved.
2# Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5
6override PROGRAMMABLE_RESET_ADDRESS := 1
7PSCI_EXTENDED_STATE_ID := 1
8A53_DISABLE_NON_TEMPORAL_HINT := 0
9SEPARATE_CODE_AND_RODATA := 1
10override RESET_TO_BL31 := 1
11PL011_GENERIC_UART := 1
12IPI_CRC_CHECK := 0
13HARDEN_SLS_ALL := 0
14
15# A72 Erratum for SoC
16ERRATA_A72_859971 := 1
17ERRATA_A72_1319367 := 1
18
19ifdef VERSAL_ATF_MEM_BASE
20    $(eval $(call add_define,VERSAL_ATF_MEM_BASE))
21
22    ifndef VERSAL_ATF_MEM_SIZE
23        $(error "VERSAL_ATF_BASE defined without VERSAL_ATF_SIZE")
24    endif
25    $(eval $(call add_define,VERSAL_ATF_MEM_SIZE))
26
27    ifdef VERSAL_ATF_MEM_PROGBITS_SIZE
28        $(eval $(call add_define,VERSAL_ATF_MEM_PROGBITS_SIZE))
29    endif
30endif
31
32ifdef VERSAL_BL32_MEM_BASE
33    $(eval $(call add_define,VERSAL_BL32_MEM_BASE))
34
35    ifndef VERSAL_BL32_MEM_SIZE
36        $(error "VERSAL_BL32_BASE defined without VERSAL_BL32_SIZE")
37    endif
38    $(eval $(call add_define,VERSAL_BL32_MEM_SIZE))
39endif
40
41ifdef IPI_CRC_CHECK
42    $(eval $(call add_define,IPI_CRC_CHECK))
43endif
44
45VERSAL_PLATFORM ?= silicon
46$(eval $(call add_define_val,VERSAL_PLATFORM,VERSAL_PLATFORM_ID_${VERSAL_PLATFORM}))
47
48PLAT_INCLUDES		:=	-Iinclude/plat/arm/common/			\
49				-Iplat/xilinx/common/include/			\
50				-Iplat/xilinx/common/ipi_mailbox_service/	\
51				-Iplat/xilinx/versal/include/			\
52				-Iplat/xilinx/versal/pm_service/
53
54# Include GICv3 driver files
55include drivers/arm/gic/v3/gicv3.mk
56
57PLAT_BL_COMMON_SOURCES	:=	lib/xlat_tables/xlat_tables_common.c		\
58				lib/xlat_tables/aarch64/xlat_tables.c		\
59				drivers/arm/dcc/dcc_console.c			\
60				drivers/delay_timer/delay_timer.c		\
61				drivers/delay_timer/generic_delay_timer.c	\
62				${GICV3_SOURCES}				\
63				drivers/arm/pl011/aarch64/pl011_console.S	\
64				plat/common/aarch64/crash_console_helpers.S	\
65				plat/arm/common/arm_cci.c			\
66				plat/arm/common/arm_common.c			\
67				plat/common/plat_gicv3.c			\
68				plat/xilinx/versal/aarch64/versal_helpers.S	\
69				plat/xilinx/versal/aarch64/versal_common.c
70
71VERSAL_CONSOLE	?=	pl011
72ifeq (${VERSAL_CONSOLE}, $(filter ${VERSAL_CONSOLE},pl011 pl011_0 pl011_1 dcc))
73else
74  $(error "Please define VERSAL_CONSOLE")
75endif
76
77$(eval $(call add_define_val,VERSAL_CONSOLE,VERSAL_CONSOLE_ID_${VERSAL_CONSOLE}))
78
79BL31_SOURCES		+=	drivers/arm/cci/cci.c				\
80				lib/cpus/aarch64/cortex_a72.S			\
81				plat/common/plat_psci_common.c			\
82				plat/xilinx/common/ipi.c			\
83				plat/xilinx/common/plat_startup.c		\
84				plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \
85				plat/xilinx/common/pm_service/pm_ipi.c		\
86				plat/xilinx/common/pm_service/pm_api_sys.c	\
87				plat/xilinx/common/pm_service/pm_svc_main.c	\
88				plat/xilinx/versal/bl31_versal_setup.c		\
89				plat/xilinx/versal/plat_psci.c			\
90				plat/xilinx/versal/plat_versal.c		\
91				plat/xilinx/versal/plat_topology.c		\
92				plat/xilinx/versal/sip_svc_setup.c		\
93				plat/xilinx/versal/versal_gicv3.c		\
94				plat/xilinx/versal/versal_ipi.c			\
95				plat/xilinx/versal/pm_service/pm_client.c
96
97ifeq ($(HARDEN_SLS_ALL), 1)
98TF_CFLAGS_aarch64      +=      -mharden-sls=all
99endif
100