xref: /rk3399_ARM-atf/plat/xilinx/versal/platform.mk (revision 7623e085cb5396054b72f1ea3f02e8c7a34568b5) 
1# Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved.
2# Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5
6override PROGRAMMABLE_RESET_ADDRESS := 1
7PSCI_EXTENDED_STATE_ID := 1
8A53_DISABLE_NON_TEMPORAL_HINT := 0
9SEPARATE_CODE_AND_RODATA := 1
10override RESET_TO_BL31 := 1
11PL011_GENERIC_UART := 1
12IPI_CRC_CHECK := 0
13HARDEN_SLS_ALL := 0
14CPU_PWRDWN_SGI ?= 6
15$(eval $(call add_define_val,CPU_PWR_DOWN_REQ_INTR,ARM_IRQ_SEC_SGI_${CPU_PWRDWN_SGI}))
16
17# A72 Erratum for SoC
18ERRATA_A72_859971 := 1
19ERRATA_A72_1319367 := 1
20
21ifdef VERSAL_ATF_MEM_BASE
22    $(eval $(call add_define,VERSAL_ATF_MEM_BASE))
23
24    ifndef VERSAL_ATF_MEM_SIZE
25        $(error "VERSAL_ATF_MEM_BASE defined without VERSAL_ATF_MEM_SIZE")
26    endif
27    $(eval $(call add_define,VERSAL_ATF_MEM_SIZE))
28
29    ifdef VERSAL_ATF_MEM_PROGBITS_SIZE
30        $(eval $(call add_define,VERSAL_ATF_MEM_PROGBITS_SIZE))
31    endif
32endif
33
34ifdef VERSAL_BL32_MEM_BASE
35    $(eval $(call add_define,VERSAL_BL32_MEM_BASE))
36
37    ifndef VERSAL_BL32_MEM_SIZE
38        $(error "VERSAL_BL32_MEM_BASE defined without VERSAL_BL32_MEM_SIZE")
39    endif
40    $(eval $(call add_define,VERSAL_BL32_MEM_SIZE))
41endif
42
43ifdef IPI_CRC_CHECK
44    $(eval $(call add_define,IPI_CRC_CHECK))
45endif
46
47ifdef VERSAL_PLATFORM
48    $(warning "VERSAL_PLATFORM has been deprecated")
49endif
50
51ifdef XILINX_OF_BOARD_DTB_ADDR
52$(eval $(call add_define,XILINX_OF_BOARD_DTB_ADDR))
53endif
54
55PLAT_XLAT_TABLES_DYNAMIC := 0
56ifeq (${PLAT_XLAT_TABLES_DYNAMIC},1)
57$(eval $(call add_define,PLAT_XLAT_TABLES_DYNAMIC))
58endif
59
60# enable assert() for release/debug builds
61ENABLE_ASSERTIONS := 1
62
63PLAT_INCLUDES		:=	-Iinclude/plat/arm/common/			\
64				-Iplat/xilinx/common/include/			\
65				-Iplat/xilinx/common/ipi_mailbox_service/	\
66				-Iplat/xilinx/versal/include/			\
67				-Iplat/xilinx/versal/pm_service/
68
69include lib/libfdt/libfdt.mk
70# Include GICv3 driver files
71include drivers/arm/gic/v3/gicv3.mk
72include lib/xlat_tables_v2/xlat_tables.mk
73
74PLAT_BL_COMMON_SOURCES	:= 	drivers/arm/dcc/dcc_console.c			\
75				drivers/delay_timer/delay_timer.c		\
76				drivers/delay_timer/generic_delay_timer.c	\
77				${GICV3_SOURCES}				\
78				drivers/arm/pl011/aarch64/pl011_console.S	\
79				plat/common/aarch64/crash_console_helpers.S	\
80				plat/arm/common/arm_cci.c			\
81				plat/arm/common/arm_common.c			\
82				plat/common/plat_gicv3.c			\
83				plat/xilinx/versal/aarch64/versal_helpers.S	\
84				plat/xilinx/versal/aarch64/versal_common.c	\
85				${XLAT_TABLES_LIB_SRCS}
86
87VERSAL_CONSOLE	?=	pl011
88ifeq (${VERSAL_CONSOLE}, $(filter ${VERSAL_CONSOLE},pl011 pl011_0 pl011_1 dcc dtb none))
89else
90  $(error "Please define VERSAL_CONSOLE")
91endif
92
93$(eval $(call add_define_val,VERSAL_CONSOLE,VERSAL_CONSOLE_ID_${VERSAL_CONSOLE}))
94
95# Runtime console in default console in DEBUG build
96ifeq ($(DEBUG), 1)
97CONSOLE_RUNTIME ?= pl011
98endif
99
100# Runtime console
101ifdef CONSOLE_RUNTIME
102ifeq (${CONSOLE_RUNTIME}, $(filter ${CONSOLE_RUNTIME},pl011 pl011_0 pl011_1 dcc dtb))
103$(eval $(call add_define_val,CONSOLE_RUNTIME,RT_CONSOLE_ID_${CONSOLE_RUNTIME}))
104else
105$(error "Please define CONSOLE_RUNTIME")
106endif
107endif
108
109BL31_SOURCES		+=	drivers/arm/cci/cci.c				\
110				lib/cpus/aarch64/cortex_a72.S			\
111				common/fdt_wrappers.c                           \
112				plat/common/plat_psci_common.c			\
113				plat/xilinx/common/ipi.c			\
114				plat/xilinx/common/plat_fdt.c			\
115				plat/xilinx/common/plat_console.c               \
116				plat/xilinx/common/plat_clkfunc.c               \
117				plat/xilinx/common/plat_startup.c		\
118				plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \
119				plat/xilinx/common/pm_service/pm_ipi.c		\
120				plat/xilinx/common/pm_service/pm_api_sys.c	\
121				plat/xilinx/common/pm_service/pm_svc_main.c	\
122				plat/xilinx/common/versal.c			\
123				plat/xilinx/versal/bl31_versal_setup.c		\
124				plat/xilinx/versal/plat_psci.c			\
125				plat/xilinx/versal/plat_versal.c		\
126				plat/xilinx/versal/plat_topology.c		\
127				plat/xilinx/versal/sip_svc_setup.c		\
128				plat/xilinx/versal/versal_gicv3.c		\
129				plat/xilinx/versal/versal_ipi.c			\
130				plat/xilinx/versal/pm_service/pm_client.c	\
131				common/fdt_fixup.c				\
132				${LIBFDT_SRCS}
133
134ifeq ($(HARDEN_SLS_ALL), 1)
135TF_CFLAGS_aarch64      +=      -mharden-sls=all
136endif
137
138ifeq (${ERRATA_ABI_SUPPORT}, 1)
139# enable the cpu macros for errata abi interface
140CORTEX_A72_H_INC	:= 1
141$(eval $(call add_define, CORTEX_A72_H_INC))
142endif
143