12cc97771SAmbroise Vincent# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. 2f91c3cb1SSiva Durga Prasad Paladugu# 3f91c3cb1SSiva Durga Prasad Paladugu# SPDX-License-Identifier: BSD-3-Clause 4f91c3cb1SSiva Durga Prasad Paladugu 5f91c3cb1SSiva Durga Prasad Paladuguoverride PROGRAMMABLE_RESET_ADDRESS := 1 6f91c3cb1SSiva Durga Prasad PaladuguPSCI_EXTENDED_STATE_ID := 1 7f91c3cb1SSiva Durga Prasad PaladuguA53_DISABLE_NON_TEMPORAL_HINT := 0 8f91c3cb1SSiva Durga Prasad PaladuguSEPARATE_CODE_AND_RODATA := 1 9f91c3cb1SSiva Durga Prasad Paladuguoverride RESET_TO_BL31 := 1 10f91c3cb1SSiva Durga Prasad PaladuguPL011_GENERIC_UART := 1 11f91c3cb1SSiva Durga Prasad Paladugu 12f91c3cb1SSiva Durga Prasad Paladuguifdef VERSAL_ATF_MEM_BASE 13f91c3cb1SSiva Durga Prasad Paladugu $(eval $(call add_define,VERSAL_ATF_MEM_BASE)) 14f91c3cb1SSiva Durga Prasad Paladugu 15f91c3cb1SSiva Durga Prasad Paladugu ifndef VERSAL_ATF_MEM_SIZE 16f91c3cb1SSiva Durga Prasad Paladugu $(error "VERSAL_ATF_BASE defined without VERSAL_ATF_SIZE") 17f91c3cb1SSiva Durga Prasad Paladugu endif 18f91c3cb1SSiva Durga Prasad Paladugu $(eval $(call add_define,VERSAL_ATF_MEM_SIZE)) 19f91c3cb1SSiva Durga Prasad Paladugu 20f91c3cb1SSiva Durga Prasad Paladugu ifdef VERSAL_ATF_MEM_PROGBITS_SIZE 21f91c3cb1SSiva Durga Prasad Paladugu $(eval $(call add_define,VERSAL_ATF_MEM_PROGBITS_SIZE)) 22f91c3cb1SSiva Durga Prasad Paladugu endif 23f91c3cb1SSiva Durga Prasad Paladuguendif 24f91c3cb1SSiva Durga Prasad Paladugu 25f91c3cb1SSiva Durga Prasad Paladuguifdef VERSAL_BL32_MEM_BASE 26f91c3cb1SSiva Durga Prasad Paladugu $(eval $(call add_define,VERSAL_BL32_MEM_BASE)) 27f91c3cb1SSiva Durga Prasad Paladugu 28f91c3cb1SSiva Durga Prasad Paladugu ifndef VERSAL_BL32_MEM_SIZE 29f91c3cb1SSiva Durga Prasad Paladugu $(error "VERSAL_BL32_BASE defined without VERSAL_BL32_SIZE") 30f91c3cb1SSiva Durga Prasad Paladugu endif 31f91c3cb1SSiva Durga Prasad Paladugu $(eval $(call add_define,VERSAL_BL32_MEM_SIZE)) 32f91c3cb1SSiva Durga Prasad Paladuguendif 33f91c3cb1SSiva Durga Prasad Paladugu 34f91c3cb1SSiva Durga Prasad PaladuguVERSAL_PLATFORM ?= versal_virt 35f91c3cb1SSiva Durga Prasad Paladugu$(eval $(call add_define_val,VERSAL_PLATFORM,VERSAL_PLATFORM_ID_${VERSAL_PLATFORM})) 36f91c3cb1SSiva Durga Prasad Paladugu 37f91c3cb1SSiva Durga Prasad PaladuguVERSAL_CONSOLE ?= pl011 38f91c3cb1SSiva Durga Prasad Paladugu$(eval $(call add_define_val,VERSAL_CONSOLE,VERSAL_CONSOLE_ID_${VERSAL_CONSOLE})) 39f91c3cb1SSiva Durga Prasad Paladugu 40*c73a90e5STejas PatelPLAT_INCLUDES := -Iplat/xilinx/common/include/ \ 41*c73a90e5STejas Patel -Iplat/xilinx/versal/include/ \ 42*c73a90e5STejas Patel -Iplat/xilinx/versal/pm_service/ 43f91c3cb1SSiva Durga Prasad Paladugu 44f91c3cb1SSiva Durga Prasad PaladuguPLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \ 45f91c3cb1SSiva Durga Prasad Paladugu lib/xlat_tables/aarch64/xlat_tables.c \ 46f91c3cb1SSiva Durga Prasad Paladugu drivers/delay_timer/delay_timer.c \ 47f91c3cb1SSiva Durga Prasad Paladugu drivers/delay_timer/generic_delay_timer.c \ 48f91c3cb1SSiva Durga Prasad Paladugu drivers/arm/gic/common/gic_common.c \ 49f91c3cb1SSiva Durga Prasad Paladugu drivers/arm/gic/v3/gicv3_main.c \ 50f91c3cb1SSiva Durga Prasad Paladugu drivers/arm/gic/v3/gicv3_helpers.c \ 51f91c3cb1SSiva Durga Prasad Paladugu drivers/arm/pl011/aarch64/pl011_console.S \ 522cc97771SAmbroise Vincent plat/common/aarch64/crash_console_helpers.S \ 53f91c3cb1SSiva Durga Prasad Paladugu plat/common/plat_gicv3.c \ 54f91c3cb1SSiva Durga Prasad Paladugu plat/xilinx/versal/aarch64/versal_helpers.S \ 55f91c3cb1SSiva Durga Prasad Paladugu plat/xilinx/versal/aarch64/versal_common.c 56f91c3cb1SSiva Durga Prasad Paladugu 57f91c3cb1SSiva Durga Prasad PaladuguBL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \ 58f91c3cb1SSiva Durga Prasad Paladugu lib/cpus/aarch64/cortex_a72.S \ 59f91c3cb1SSiva Durga Prasad Paladugu plat/common/plat_psci_common.c \ 60*c73a90e5STejas Patel plat/xilinx/common/ipi.c \ 61*c73a90e5STejas Patel plat/xilinx/common/pm_service/pm_ipi.c \ 62f91c3cb1SSiva Durga Prasad Paladugu plat/xilinx/versal/bl31_versal_setup.c \ 63f91c3cb1SSiva Durga Prasad Paladugu plat/xilinx/versal/plat_psci.c \ 64f91c3cb1SSiva Durga Prasad Paladugu plat/xilinx/versal/plat_versal.c \ 65f91c3cb1SSiva Durga Prasad Paladugu plat/xilinx/versal/plat_topology.c \ 66f91c3cb1SSiva Durga Prasad Paladugu plat/xilinx/versal/sip_svc_setup.c \ 67*c73a90e5STejas Patel plat/xilinx/versal/versal_gicv3.c \ 68*c73a90e5STejas Patel plat/xilinx/versal/versal_ipi.c \ 69*c73a90e5STejas Patel plat/xilinx/versal/pm_service/pm_svc_main.c \ 70*c73a90e5STejas Patel plat/xilinx/versal/pm_service/pm_client.c 71