1 /* 2 * Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved. 3 * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #include <assert.h> 9 10 #include <common/debug.h> 11 #include <lib/mmio.h> 12 #include <lib/psci/psci.h> 13 #include <plat/arm/common/plat_arm.h> 14 #include <plat/common/platform.h> 15 #include <plat_arm.h> 16 17 #include "drivers/delay_timer.h" 18 #include <plat_private.h> 19 #include "pm_api_sys.h" 20 #include "pm_client.h" 21 #include <pm_common.h> 22 #include "pm_ipi.h" 23 #include "pm_svc_main.h" 24 25 static uintptr_t versal_sec_entry; 26 27 static int32_t versal_pwr_domain_on(u_register_t mpidr) 28 { 29 int32_t cpu_id = plat_core_pos_by_mpidr(mpidr); 30 const struct pm_proc *proc; 31 32 VERBOSE("%s: mpidr: 0x%lx\n", __func__, mpidr); 33 34 if (cpu_id == -1) { 35 return PSCI_E_INTERN_FAIL; 36 } 37 38 proc = pm_get_proc((uint32_t)cpu_id); 39 40 /* Send request to PMC to wake up selected ACPU core */ 41 (void)pm_req_wakeup(proc->node_id, (versal_sec_entry & 0xFFFFFFFFU) | 0x1U, 42 versal_sec_entry >> 32, 0, SECURE_FLAG); 43 44 /* Clear power down request */ 45 pm_client_wakeup(proc); 46 47 return PSCI_E_SUCCESS; 48 } 49 50 /** 51 * versal_pwr_domain_suspend() - This function sends request to PMC to suspend 52 * core. 53 * @target_state: Targated state. 54 * 55 */ 56 static void versal_pwr_domain_suspend(const psci_power_state_t *target_state) 57 { 58 uint32_t state; 59 uint32_t cpu_id = plat_my_core_pos(); 60 const struct pm_proc *proc = pm_get_proc(cpu_id); 61 62 for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) { 63 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", 64 __func__, i, target_state->pwr_domain_state[i]); 65 } 66 67 plat_versal_gic_cpuif_disable(); 68 69 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { 70 plat_versal_gic_save(); 71 } 72 73 state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ? 74 PM_STATE_SUSPEND_TO_RAM : PM_STATE_CPU_IDLE; 75 76 /* Send request to PMC to suspend this core */ 77 (void)pm_self_suspend(proc->node_id, MAX_LATENCY, state, versal_sec_entry, 78 SECURE_FLAG); 79 80 /* APU is to be turned off */ 81 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { 82 /* disable coherency */ 83 plat_arm_interconnect_exit_coherency(); 84 } 85 } 86 87 /** 88 * versal_pwr_domain_suspend_finish() - This function performs actions to finish 89 * suspend procedure. 90 * @target_state: Targated state. 91 * 92 */ 93 static void versal_pwr_domain_suspend_finish( 94 const psci_power_state_t *target_state) 95 { 96 uint32_t cpu_id = plat_my_core_pos(); 97 const struct pm_proc *proc = pm_get_proc(cpu_id); 98 99 for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) { 100 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", 101 __func__, i, target_state->pwr_domain_state[i]); 102 } 103 104 /* Clear the APU power control register for this cpu */ 105 pm_client_wakeup(proc); 106 107 /* enable coherency */ 108 plat_arm_interconnect_enter_coherency(); 109 110 /* APU was turned off, so restore GIC context */ 111 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { 112 plat_versal_gic_resume(); 113 } 114 115 plat_versal_gic_cpuif_enable(); 116 } 117 118 void versal_pwr_domain_on_finish(const psci_power_state_t *target_state) 119 { 120 /* Enable the gic cpu interface */ 121 plat_versal_gic_pcpu_init(); 122 123 /* Program the gic per-cpu distributor or re-distributor interface */ 124 plat_versal_gic_cpuif_enable(); 125 } 126 127 /** 128 * versal_system_off() - This function sends the system off request to firmware. 129 * This function does not return. 130 * 131 */ 132 static void __dead2 versal_system_off(void) 133 { 134 /* Send the power down request to the PMC */ 135 (void)pm_system_shutdown(XPM_SHUTDOWN_TYPE_SHUTDOWN, 136 pm_get_shutdown_scope(), SECURE_FLAG); 137 138 while (1) { 139 wfi(); 140 } 141 } 142 143 /** 144 * versal_system_reset() - This function sends the reset request to firmware 145 * for the system to reset. This function does not 146 * return. 147 * 148 */ 149 static void __dead2 versal_system_reset(void) 150 { 151 uint32_t ret, timeout = 10000U; 152 153 request_cpu_pwrdwn(); 154 155 /* 156 * Send the system reset request to the firmware if power down request 157 * is not received from firmware. 158 */ 159 if (!pwrdwn_req_received) { 160 (void)pm_system_shutdown(XPM_SHUTDOWN_TYPE_RESET, 161 pm_get_shutdown_scope(), SECURE_FLAG); 162 163 /* 164 * Wait for system shutdown request completed and idle callback 165 * not received. 166 */ 167 do { 168 ret = ipi_mb_enquire_status(primary_proc->ipi->local_ipi_id, 169 primary_proc->ipi->remote_ipi_id); 170 udelay(100); 171 timeout--; 172 } while ((ret != IPI_MB_STATUS_RECV_PENDING) && (timeout > 0U)); 173 } 174 175 (void)psci_cpu_off(); 176 177 while (1) { 178 wfi(); 179 } 180 } 181 182 /** 183 * versal_pwr_domain_off() - This function performs actions to turn off core. 184 * @target_state: Targated state. 185 * 186 */ 187 static void versal_pwr_domain_off(const psci_power_state_t *target_state) 188 { 189 uint32_t ret, fw_api_version, version[PAYLOAD_ARG_CNT] = {0U}; 190 uint32_t cpu_id = plat_my_core_pos(); 191 const struct pm_proc *proc = pm_get_proc(cpu_id); 192 193 for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) { 194 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", 195 __func__, i, target_state->pwr_domain_state[i]); 196 } 197 198 /* Prevent interrupts from spuriously waking up this cpu */ 199 plat_versal_gic_cpuif_disable(); 200 201 /* 202 * Send request to PMC to power down the appropriate APU CPU 203 * core. 204 * According to PSCI specification, CPU_off function does not 205 * have resume address and CPU core can only be woken up 206 * invoking CPU_on function, during which resume address will 207 * be set. 208 */ 209 ret = pm_feature_check((uint32_t)PM_SELF_SUSPEND, &version[0], SECURE_FLAG); 210 if (ret == PM_RET_SUCCESS) { 211 fw_api_version = version[0] & 0xFFFFU; 212 if (fw_api_version >= 3U) { 213 (void)pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_OFF, 0, 214 SECURE_FLAG); 215 } else { 216 (void)pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_IDLE, 0, 217 SECURE_FLAG); 218 } 219 } 220 } 221 222 /** 223 * versal_validate_power_state() - This function ensures that the power state 224 * parameter in request is valid. 225 * @power_state: Power state of core. 226 * @req_state: Requested state. 227 * 228 * Return: Returns status, either success or reason. 229 * 230 */ 231 static int32_t versal_validate_power_state(uint32_t power_state, 232 psci_power_state_t *req_state) 233 { 234 VERBOSE("%s: power_state: 0x%x\n", __func__, power_state); 235 236 uint32_t pstate = psci_get_pstate_type(power_state); 237 238 assert(req_state); 239 240 /* Sanity check the requested state */ 241 if (pstate == PSTATE_TYPE_STANDBY) { 242 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; 243 } else { 244 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; 245 } 246 247 /* We expect the 'state id' to be zero */ 248 if (psci_get_pstate_id(power_state) != 0U) { 249 return PSCI_E_INVALID_PARAMS; 250 } 251 252 return PSCI_E_SUCCESS; 253 } 254 255 /** 256 * versal_get_sys_suspend_power_state() - Get power state for system suspend. 257 * @req_state: Requested state. 258 * 259 */ 260 static void versal_get_sys_suspend_power_state(psci_power_state_t *req_state) 261 { 262 req_state->pwr_domain_state[PSCI_CPU_PWR_LVL] = PLAT_MAX_OFF_STATE; 263 req_state->pwr_domain_state[1] = PLAT_MAX_OFF_STATE; 264 } 265 266 static const struct plat_psci_ops versal_nopmc_psci_ops = { 267 .pwr_domain_on = versal_pwr_domain_on, 268 .pwr_domain_off = versal_pwr_domain_off, 269 .pwr_domain_on_finish = versal_pwr_domain_on_finish, 270 .pwr_domain_suspend = versal_pwr_domain_suspend, 271 .pwr_domain_suspend_finish = versal_pwr_domain_suspend_finish, 272 .system_off = versal_system_off, 273 .system_reset = versal_system_reset, 274 .validate_power_state = versal_validate_power_state, 275 .get_sys_suspend_power_state = versal_get_sys_suspend_power_state, 276 }; 277 278 /******************************************************************************* 279 * Export the platform specific power ops. 280 ******************************************************************************/ 281 int32_t plat_setup_psci_ops(uintptr_t sec_entrypoint, 282 const struct plat_psci_ops **psci_ops) 283 { 284 versal_sec_entry = sec_entrypoint; 285 286 *psci_ops = &versal_nopmc_psci_ops; 287 288 return 0; 289 } 290