1 /* 2 * Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved. 3 * Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #include <assert.h> 9 10 #include <common/debug.h> 11 #include <lib/mmio.h> 12 #include <lib/psci/psci.h> 13 #include <plat/arm/common/plat_arm.h> 14 #include <plat/common/platform.h> 15 #include <plat_arm.h> 16 17 #include "drivers/delay_timer.h" 18 #include <plat_private.h> 19 #include "pm_api_sys.h" 20 #include "pm_client.h" 21 #include <pm_common.h> 22 #include "pm_ipi.h" 23 #include "pm_svc_main.h" 24 25 static uintptr_t versal_sec_entry; 26 27 static int32_t versal_pwr_domain_on(u_register_t mpidr) 28 { 29 int32_t cpu_id = plat_core_pos_by_mpidr(mpidr); 30 const struct pm_proc *proc; 31 int32_t ret = PSCI_E_INTERN_FAIL; 32 33 VERBOSE("%s: mpidr: 0x%lx\n", __func__, mpidr); 34 35 if (cpu_id == -1) { 36 goto exit_label; 37 } 38 39 proc = pm_get_proc((uint32_t)cpu_id); 40 if (proc == NULL) { 41 goto exit_label; 42 } 43 44 /* Send request to PMC to wake up selected ACPU core */ 45 (void)pm_req_wakeup(proc->node_id, (versal_sec_entry & 0xFFFFFFFFU) | 0x1U, 46 versal_sec_entry >> 32, 0, SECURE_FLAG); 47 48 /* Clear power down request */ 49 pm_client_wakeup(proc); 50 51 ret = PSCI_E_SUCCESS; 52 53 exit_label: 54 return ret; 55 } 56 57 /** 58 * versal_pwr_domain_suspend() - This function sends request to PMC to suspend 59 * core. 60 * @target_state: Targated state. 61 * 62 */ 63 static void versal_pwr_domain_suspend(const psci_power_state_t *target_state) 64 { 65 uint32_t state; 66 uint32_t cpu_id = plat_my_core_pos(); 67 const struct pm_proc *proc = pm_get_proc(cpu_id); 68 69 if (proc == NULL) { 70 return; 71 } 72 73 for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) { 74 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", 75 __func__, i, target_state->pwr_domain_state[i]); 76 } 77 78 plat_versal_gic_cpuif_disable(); 79 80 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { 81 plat_versal_gic_save(); 82 } 83 84 state = (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) ? 85 PM_STATE_SUSPEND_TO_RAM : PM_STATE_CPU_IDLE; 86 87 /* Send request to PMC to suspend this core */ 88 (void)pm_self_suspend(proc->node_id, MAX_LATENCY, state, versal_sec_entry, 89 SECURE_FLAG); 90 91 /* APU is to be turned off */ 92 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { 93 /* disable coherency */ 94 plat_arm_interconnect_exit_coherency(); 95 } 96 } 97 98 /** 99 * versal_pwr_domain_suspend_finish() - This function performs actions to finish 100 * suspend procedure. 101 * @target_state: Targated state. 102 * 103 */ 104 static void versal_pwr_domain_suspend_finish( 105 const psci_power_state_t *target_state) 106 { 107 uint32_t cpu_id = plat_my_core_pos(); 108 const struct pm_proc *proc = pm_get_proc(cpu_id); 109 110 if (proc == NULL) { 111 return; 112 } 113 114 for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) { 115 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", 116 __func__, i, target_state->pwr_domain_state[i]); 117 } 118 119 /* Clear the APU power control register for this cpu */ 120 pm_client_wakeup(proc); 121 122 /* enable coherency */ 123 plat_arm_interconnect_enter_coherency(); 124 125 /* APU was turned off, so restore GIC context */ 126 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { 127 plat_versal_gic_resume(); 128 } 129 130 plat_versal_gic_cpuif_enable(); 131 } 132 133 static void versal_pwr_domain_on_finish(const psci_power_state_t *target_state) 134 { 135 /* Enable the gic cpu interface */ 136 plat_versal_gic_pcpu_init(); 137 138 /* Program the gic per-cpu distributor or re-distributor interface */ 139 plat_versal_gic_cpuif_enable(); 140 } 141 142 /** 143 * versal_system_off() - This function sends the system off request to firmware. 144 * This function does not return. 145 * 146 */ 147 static void __dead2 versal_system_off(void) 148 { 149 /* Send the power down request to the PMC */ 150 (void)pm_system_shutdown(XPM_SHUTDOWN_TYPE_SHUTDOWN, 151 pm_get_shutdown_scope(), SECURE_FLAG); 152 153 while (true) { 154 wfi(); 155 } 156 } 157 158 /** 159 * versal_system_reset() - This function sends the reset request to firmware 160 * for the system to reset. This function does not 161 * return. 162 * 163 */ 164 static void __dead2 versal_system_reset(void) 165 { 166 uint32_t ret, timeout = 10000U; 167 168 request_cpu_pwrdwn(); 169 170 /* 171 * Send the system reset request to the firmware if power down request 172 * is not received from firmware. 173 */ 174 if (!pwrdwn_req_received) { 175 (void)pm_system_shutdown(XPM_SHUTDOWN_TYPE_RESET, 176 pm_get_shutdown_scope(), SECURE_FLAG); 177 178 /* 179 * Wait for system shutdown request completed and idle callback 180 * not received. 181 */ 182 do { 183 ret = ipi_mb_enquire_status(primary_proc->ipi->local_ipi_id, 184 primary_proc->ipi->remote_ipi_id); 185 udelay(100); 186 timeout--; 187 } while ((ret != IPI_MB_STATUS_RECV_PENDING) && (timeout > 0U)); 188 } 189 190 (void)psci_cpu_off(); 191 192 while (true) { 193 wfi(); 194 } 195 } 196 197 static int32_t versal_validate_ns_entrypoint(uint64_t ns_entrypoint) 198 { 199 int32_t ret = PSCI_E_SUCCESS; 200 201 if (((ns_entrypoint >= PLAT_DDR_LOWMEM_MAX) && (ns_entrypoint <= PLAT_DDR_HIGHMEM_MAX)) || 202 ((ns_entrypoint >= BL31_BASE) && (ns_entrypoint <= BL31_LIMIT))) { 203 ret = PSCI_E_INVALID_ADDRESS; 204 } 205 206 return ret; 207 } 208 209 /** 210 * versal_pwr_domain_off() - This function performs actions to turn off core. 211 * @target_state: Targated state. 212 * 213 */ 214 static void versal_pwr_domain_off(const psci_power_state_t *target_state) 215 { 216 uint32_t ret, fw_api_version, version_type[RET_PAYLOAD_ARG_CNT] = {0U}; 217 uint32_t cpu_id = plat_my_core_pos(); 218 const struct pm_proc *proc = pm_get_proc(cpu_id); 219 220 if (proc == NULL) { 221 return; 222 } 223 224 for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) { 225 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", 226 __func__, i, target_state->pwr_domain_state[i]); 227 } 228 229 /* Prevent interrupts from spuriously waking up this cpu */ 230 plat_versal_gic_cpuif_disable(); 231 232 /* 233 * Send request to PMC to power down the appropriate APU CPU 234 * core. 235 * According to PSCI specification, CPU_off function does not 236 * have resume address and CPU core can only be woken up 237 * invoking CPU_on function, during which resume address will 238 * be set. 239 */ 240 ret = pm_feature_check((uint32_t)PM_SELF_SUSPEND, &version_type[0], SECURE_FLAG); 241 if (ret == (uint32_t)PM_RET_SUCCESS) { 242 fw_api_version = version_type[0] & 0xFFFFU; 243 if (fw_api_version >= 3U) { 244 (void)pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_OFF, 0, 245 SECURE_FLAG); 246 } else { 247 (void)pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_IDLE, 0, 248 SECURE_FLAG); 249 } 250 } 251 } 252 253 /** 254 * versal_validate_power_state() - This function ensures that the power state 255 * parameter in request is valid. 256 * @power_state: Power state of core. 257 * @req_state: Requested state. 258 * 259 * Return: Returns status, either success or reason. 260 * 261 */ 262 static int32_t versal_validate_power_state(uint32_t power_state, 263 psci_power_state_t *req_state) 264 { 265 int32_t ret = PSCI_E_SUCCESS; 266 VERBOSE("%s: power_state: 0x%x\n", __func__, power_state); 267 268 uint32_t pstate = psci_get_pstate_type(power_state); 269 270 assert(req_state != NULL); 271 272 /* Sanity check the requested state */ 273 if (pstate == PSTATE_TYPE_STANDBY) { 274 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; 275 } else { 276 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; 277 } 278 279 /* We expect the 'state id' to be zero */ 280 if (psci_get_pstate_id(power_state) != 0U) { 281 ret = PSCI_E_INVALID_PARAMS; 282 } 283 284 return ret; 285 } 286 287 /** 288 * versal_get_sys_suspend_power_state() - Get power state for system suspend. 289 * @req_state: Requested state. 290 * 291 */ 292 static void versal_get_sys_suspend_power_state(psci_power_state_t *req_state) 293 { 294 req_state->pwr_domain_state[PSCI_CPU_PWR_LVL] = PLAT_MAX_OFF_STATE; 295 req_state->pwr_domain_state[1] = PLAT_MAX_OFF_STATE; 296 } 297 298 static const struct plat_psci_ops versal_nopmc_psci_ops = { 299 .pwr_domain_on = versal_pwr_domain_on, 300 .pwr_domain_off = versal_pwr_domain_off, 301 .pwr_domain_on_finish = versal_pwr_domain_on_finish, 302 .pwr_domain_suspend = versal_pwr_domain_suspend, 303 .pwr_domain_suspend_finish = versal_pwr_domain_suspend_finish, 304 .system_off = versal_system_off, 305 .system_reset = versal_system_reset, 306 .validate_ns_entrypoint = versal_validate_ns_entrypoint, 307 .validate_power_state = versal_validate_power_state, 308 .get_sys_suspend_power_state = versal_get_sys_suspend_power_state, 309 }; 310 311 /******************************************************************************* 312 * Export the platform specific power ops. 313 ******************************************************************************/ 314 int32_t plat_setup_psci_ops(uintptr_t sec_entrypoint, 315 const struct plat_psci_ops **psci_ops) 316 { 317 versal_sec_entry = sec_entrypoint; 318 319 *psci_ops = &versal_nopmc_psci_ops; 320 321 return 0; 322 } 323