1f91c3cb1SSiva Durga Prasad Paladugu /* 2*d4c7b550SRavi Patel * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved. 3f91c3cb1SSiva Durga Prasad Paladugu * 4f91c3cb1SSiva Durga Prasad Paladugu * SPDX-License-Identifier: BSD-3-Clause 5f91c3cb1SSiva Durga Prasad Paladugu */ 6f91c3cb1SSiva Durga Prasad Paladugu 75a8ffeabSTejas Patel #include <assert.h> 85a8ffeabSTejas Patel #include <plat_arm.h> 9d4821739STejas Patel #include <plat_private.h> 10394a65aaSTejas Patel #include <pm_common.h> 1109d40e0eSAntonio Nino Diaz #include <common/debug.h> 1209d40e0eSAntonio Nino Diaz #include <lib/mmio.h> 1309d40e0eSAntonio Nino Diaz #include <lib/psci/psci.h> 1409d40e0eSAntonio Nino Diaz #include <plat/common/platform.h> 150abf4bbaSSaeed Nowshadi #include <plat/arm/common/plat_arm.h> 1609d40e0eSAntonio Nino Diaz 17394a65aaSTejas Patel #include "pm_api_sys.h" 18394a65aaSTejas Patel #include "pm_client.h" 19394a65aaSTejas Patel 20f91c3cb1SSiva Durga Prasad Paladugu static uintptr_t versal_sec_entry; 21f91c3cb1SSiva Durga Prasad Paladugu 22394a65aaSTejas Patel static int versal_pwr_domain_on(u_register_t mpidr) 23f91c3cb1SSiva Durga Prasad Paladugu { 24f91c3cb1SSiva Durga Prasad Paladugu unsigned int cpu_id = plat_core_pos_by_mpidr(mpidr); 25394a65aaSTejas Patel const struct pm_proc *proc; 26f91c3cb1SSiva Durga Prasad Paladugu 27f91c3cb1SSiva Durga Prasad Paladugu VERBOSE("%s: mpidr: 0x%lx\n", __func__, mpidr); 28f91c3cb1SSiva Durga Prasad Paladugu 29f91c3cb1SSiva Durga Prasad Paladugu if (cpu_id == -1) 30f91c3cb1SSiva Durga Prasad Paladugu return PSCI_E_INTERN_FAIL; 31f91c3cb1SSiva Durga Prasad Paladugu 32394a65aaSTejas Patel proc = pm_get_proc(cpu_id); 33f91c3cb1SSiva Durga Prasad Paladugu 34394a65aaSTejas Patel /* Send request to PMC to wake up selected ACPU core */ 35394a65aaSTejas Patel pm_req_wakeup(proc->node_id, (versal_sec_entry & 0xFFFFFFFF) | 0x1, 36394a65aaSTejas Patel versal_sec_entry >> 32, 0); 37f91c3cb1SSiva Durga Prasad Paladugu 38394a65aaSTejas Patel /* Clear power down request */ 39394a65aaSTejas Patel pm_client_wakeup(proc); 40f91c3cb1SSiva Durga Prasad Paladugu 41f91c3cb1SSiva Durga Prasad Paladugu return PSCI_E_SUCCESS; 42f91c3cb1SSiva Durga Prasad Paladugu } 43f91c3cb1SSiva Durga Prasad Paladugu 445a8ffeabSTejas Patel /** 455a8ffeabSTejas Patel * versal_pwr_domain_suspend() - This function sends request to PMC to suspend 465a8ffeabSTejas Patel * core. 475a8ffeabSTejas Patel * 485a8ffeabSTejas Patel * @target_state Targated state 495a8ffeabSTejas Patel */ 505a8ffeabSTejas Patel static void versal_pwr_domain_suspend(const psci_power_state_t *target_state) 515a8ffeabSTejas Patel { 525a8ffeabSTejas Patel unsigned int state; 535a8ffeabSTejas Patel unsigned int cpu_id = plat_my_core_pos(); 545a8ffeabSTejas Patel const struct pm_proc *proc = pm_get_proc(cpu_id); 555a8ffeabSTejas Patel 565a8ffeabSTejas Patel for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) 575a8ffeabSTejas Patel VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", 585a8ffeabSTejas Patel __func__, i, target_state->pwr_domain_state[i]); 595a8ffeabSTejas Patel 605a8ffeabSTejas Patel plat_versal_gic_cpuif_disable(); 615a8ffeabSTejas Patel 62*d4c7b550SRavi Patel if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { 635a8ffeabSTejas Patel plat_versal_gic_save(); 64*d4c7b550SRavi Patel } 655a8ffeabSTejas Patel 665a8ffeabSTejas Patel state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ? 675a8ffeabSTejas Patel PM_STATE_SUSPEND_TO_RAM : PM_STATE_CPU_IDLE; 685a8ffeabSTejas Patel 695a8ffeabSTejas Patel /* Send request to PMC to suspend this core */ 705a8ffeabSTejas Patel pm_self_suspend(proc->node_id, MAX_LATENCY, state, versal_sec_entry); 715a8ffeabSTejas Patel 725a8ffeabSTejas Patel /* APU is to be turned off */ 735a8ffeabSTejas Patel if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { 745a8ffeabSTejas Patel /* disable coherency */ 755a8ffeabSTejas Patel plat_arm_interconnect_exit_coherency(); 765a8ffeabSTejas Patel } 775a8ffeabSTejas Patel } 785a8ffeabSTejas Patel 795a8ffeabSTejas Patel /** 805a8ffeabSTejas Patel * versal_pwr_domain_suspend_finish() - This function performs actions to finish 815a8ffeabSTejas Patel * suspend procedure. 825a8ffeabSTejas Patel * 835a8ffeabSTejas Patel * @target_state Targated state 845a8ffeabSTejas Patel */ 855a8ffeabSTejas Patel static void versal_pwr_domain_suspend_finish( 865a8ffeabSTejas Patel const psci_power_state_t *target_state) 875a8ffeabSTejas Patel { 885a8ffeabSTejas Patel unsigned int cpu_id = plat_my_core_pos(); 895a8ffeabSTejas Patel const struct pm_proc *proc = pm_get_proc(cpu_id); 905a8ffeabSTejas Patel 915a8ffeabSTejas Patel for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) 925a8ffeabSTejas Patel VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", 935a8ffeabSTejas Patel __func__, i, target_state->pwr_domain_state[i]); 945a8ffeabSTejas Patel 955a8ffeabSTejas Patel /* Clear the APU power control register for this cpu */ 965a8ffeabSTejas Patel pm_client_wakeup(proc); 975a8ffeabSTejas Patel 985a8ffeabSTejas Patel /* enable coherency */ 995a8ffeabSTejas Patel plat_arm_interconnect_enter_coherency(); 1005a8ffeabSTejas Patel 1015a8ffeabSTejas Patel /* APU was turned off, so restore GIC context */ 1025a8ffeabSTejas Patel if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { 1035a8ffeabSTejas Patel plat_versal_gic_resume(); 1045a8ffeabSTejas Patel } 105*d4c7b550SRavi Patel 106*d4c7b550SRavi Patel plat_versal_gic_cpuif_enable(); 1075a8ffeabSTejas Patel } 1085a8ffeabSTejas Patel 109f91c3cb1SSiva Durga Prasad Paladugu void versal_pwr_domain_on_finish(const psci_power_state_t *target_state) 110f91c3cb1SSiva Durga Prasad Paladugu { 111f91c3cb1SSiva Durga Prasad Paladugu /* Enable the gic cpu interface */ 112f91c3cb1SSiva Durga Prasad Paladugu plat_versal_gic_pcpu_init(); 113f91c3cb1SSiva Durga Prasad Paladugu 114f91c3cb1SSiva Durga Prasad Paladugu /* Program the gic per-cpu distributor or re-distributor interface */ 115f91c3cb1SSiva Durga Prasad Paladugu plat_versal_gic_cpuif_enable(); 116f91c3cb1SSiva Durga Prasad Paladugu } 117f91c3cb1SSiva Durga Prasad Paladugu 1185a8ffeabSTejas Patel /** 1190abf4bbaSSaeed Nowshadi * versal_system_off() - This function sends the system off request 1200abf4bbaSSaeed Nowshadi * to firmware. This function does not return. 1210abf4bbaSSaeed Nowshadi */ 1220abf4bbaSSaeed Nowshadi static void __dead2 versal_system_off(void) 1230abf4bbaSSaeed Nowshadi { 1240abf4bbaSSaeed Nowshadi /* Send the power down request to the PMC */ 1250abf4bbaSSaeed Nowshadi pm_system_shutdown(XPM_SHUTDOWN_TYPE_SHUTDOWN, 1260abf4bbaSSaeed Nowshadi pm_get_shutdown_scope()); 1270abf4bbaSSaeed Nowshadi 1280abf4bbaSSaeed Nowshadi while (1) 1290abf4bbaSSaeed Nowshadi wfi(); 1300abf4bbaSSaeed Nowshadi } 1310abf4bbaSSaeed Nowshadi 1320abf4bbaSSaeed Nowshadi /** 1330abf4bbaSSaeed Nowshadi * versal_system_reset() - This function sends the reset request 1340abf4bbaSSaeed Nowshadi * to firmware for the system to reset. This function does not return. 1350abf4bbaSSaeed Nowshadi */ 1360abf4bbaSSaeed Nowshadi static void __dead2 versal_system_reset(void) 1370abf4bbaSSaeed Nowshadi { 1380abf4bbaSSaeed Nowshadi /* Send the system reset request to the PMC */ 1390abf4bbaSSaeed Nowshadi pm_system_shutdown(XPM_SHUTDOWN_TYPE_RESET, 1400abf4bbaSSaeed Nowshadi pm_get_shutdown_scope()); 1410abf4bbaSSaeed Nowshadi 1420abf4bbaSSaeed Nowshadi while (1) 1430abf4bbaSSaeed Nowshadi wfi(); 1440abf4bbaSSaeed Nowshadi } 1450abf4bbaSSaeed Nowshadi 1460abf4bbaSSaeed Nowshadi /** 1475a8ffeabSTejas Patel * versal_pwr_domain_off() - This function performs actions to turn off core 1485a8ffeabSTejas Patel * 1495a8ffeabSTejas Patel * @target_state Targated state 1505a8ffeabSTejas Patel */ 1515a8ffeabSTejas Patel static void versal_pwr_domain_off(const psci_power_state_t *target_state) 1525a8ffeabSTejas Patel { 1535a8ffeabSTejas Patel unsigned int cpu_id = plat_my_core_pos(); 1545a8ffeabSTejas Patel const struct pm_proc *proc = pm_get_proc(cpu_id); 1555a8ffeabSTejas Patel 1565a8ffeabSTejas Patel for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) 1575a8ffeabSTejas Patel VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", 1585a8ffeabSTejas Patel __func__, i, target_state->pwr_domain_state[i]); 1595a8ffeabSTejas Patel 1605a8ffeabSTejas Patel /* Prevent interrupts from spuriously waking up this cpu */ 1615a8ffeabSTejas Patel plat_versal_gic_cpuif_disable(); 1625a8ffeabSTejas Patel 1635a8ffeabSTejas Patel /* 1645a8ffeabSTejas Patel * Send request to PMC to power down the appropriate APU CPU 1655a8ffeabSTejas Patel * core. 1665a8ffeabSTejas Patel * According to PSCI specification, CPU_off function does not 1675a8ffeabSTejas Patel * have resume address and CPU core can only be woken up 1685a8ffeabSTejas Patel * invoking CPU_on function, during which resume address will 1695a8ffeabSTejas Patel * be set. 1705a8ffeabSTejas Patel */ 1715a8ffeabSTejas Patel pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_IDLE, 0); 1725a8ffeabSTejas Patel } 1735a8ffeabSTejas Patel 1745a8ffeabSTejas Patel /** 1755a8ffeabSTejas Patel * versal_validate_power_state() - This function ensures that the power state 1765a8ffeabSTejas Patel * parameter in request is valid. 1775a8ffeabSTejas Patel * 1785a8ffeabSTejas Patel * @power_state Power state of core 1795a8ffeabSTejas Patel * @req_state Requested state 1805a8ffeabSTejas Patel * 1815a8ffeabSTejas Patel * @return Returns status, either success or reason 1825a8ffeabSTejas Patel */ 1835a8ffeabSTejas Patel static int versal_validate_power_state(unsigned int power_state, 1845a8ffeabSTejas Patel psci_power_state_t *req_state) 1855a8ffeabSTejas Patel { 1865a8ffeabSTejas Patel VERBOSE("%s: power_state: 0x%x\n", __func__, power_state); 1875a8ffeabSTejas Patel 1885a8ffeabSTejas Patel int pstate = psci_get_pstate_type(power_state); 1895a8ffeabSTejas Patel 1905a8ffeabSTejas Patel assert(req_state); 1915a8ffeabSTejas Patel 1925a8ffeabSTejas Patel /* Sanity check the requested state */ 1935a8ffeabSTejas Patel if (pstate == PSTATE_TYPE_STANDBY) 1945a8ffeabSTejas Patel req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; 1955a8ffeabSTejas Patel else 1965a8ffeabSTejas Patel req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; 1975a8ffeabSTejas Patel 1985a8ffeabSTejas Patel /* We expect the 'state id' to be zero */ 1995a8ffeabSTejas Patel if (psci_get_pstate_id(power_state)) 2005a8ffeabSTejas Patel return PSCI_E_INVALID_PARAMS; 2015a8ffeabSTejas Patel 2025a8ffeabSTejas Patel return PSCI_E_SUCCESS; 2035a8ffeabSTejas Patel } 2045a8ffeabSTejas Patel 2055a8ffeabSTejas Patel /** 2065a8ffeabSTejas Patel * versal_get_sys_suspend_power_state() - Get power state for system suspend 2075a8ffeabSTejas Patel * 2085a8ffeabSTejas Patel * @req_state Requested state 2095a8ffeabSTejas Patel */ 2105a8ffeabSTejas Patel static void versal_get_sys_suspend_power_state(psci_power_state_t *req_state) 2115a8ffeabSTejas Patel { 2125a8ffeabSTejas Patel req_state->pwr_domain_state[PSCI_CPU_PWR_LVL] = PLAT_MAX_OFF_STATE; 2135a8ffeabSTejas Patel req_state->pwr_domain_state[1] = PLAT_MAX_OFF_STATE; 2145a8ffeabSTejas Patel } 2155a8ffeabSTejas Patel 216f91c3cb1SSiva Durga Prasad Paladugu static const struct plat_psci_ops versal_nopmc_psci_ops = { 217394a65aaSTejas Patel .pwr_domain_on = versal_pwr_domain_on, 2185a8ffeabSTejas Patel .pwr_domain_off = versal_pwr_domain_off, 219f91c3cb1SSiva Durga Prasad Paladugu .pwr_domain_on_finish = versal_pwr_domain_on_finish, 2205a8ffeabSTejas Patel .pwr_domain_suspend = versal_pwr_domain_suspend, 2215a8ffeabSTejas Patel .pwr_domain_suspend_finish = versal_pwr_domain_suspend_finish, 2220abf4bbaSSaeed Nowshadi .system_off = versal_system_off, 2230abf4bbaSSaeed Nowshadi .system_reset = versal_system_reset, 2245a8ffeabSTejas Patel .validate_power_state = versal_validate_power_state, 2255a8ffeabSTejas Patel .get_sys_suspend_power_state = versal_get_sys_suspend_power_state, 226f91c3cb1SSiva Durga Prasad Paladugu }; 227f91c3cb1SSiva Durga Prasad Paladugu 228f91c3cb1SSiva Durga Prasad Paladugu /******************************************************************************* 229f91c3cb1SSiva Durga Prasad Paladugu * Export the platform specific power ops. 230f91c3cb1SSiva Durga Prasad Paladugu ******************************************************************************/ 231f91c3cb1SSiva Durga Prasad Paladugu int plat_setup_psci_ops(uintptr_t sec_entrypoint, 232f91c3cb1SSiva Durga Prasad Paladugu const struct plat_psci_ops **psci_ops) 233f91c3cb1SSiva Durga Prasad Paladugu { 234f91c3cb1SSiva Durga Prasad Paladugu versal_sec_entry = sec_entrypoint; 235f91c3cb1SSiva Durga Prasad Paladugu 236f91c3cb1SSiva Durga Prasad Paladugu *psci_ops = &versal_nopmc_psci_ops; 237f91c3cb1SSiva Durga Prasad Paladugu 238f91c3cb1SSiva Durga Prasad Paladugu return 0; 239f91c3cb1SSiva Durga Prasad Paladugu } 240