xref: /rk3399_ARM-atf/plat/xilinx/versal/plat_psci.c (revision 88ee0816a7429689890659f69b895ac84e48f141)
1f91c3cb1SSiva Durga Prasad Paladugu /*
2619bc13eSMichal Simek  * Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved.
3de7ed953SPrasad Kummari  * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
4f91c3cb1SSiva Durga Prasad Paladugu  *
5f91c3cb1SSiva Durga Prasad Paladugu  * SPDX-License-Identifier: BSD-3-Clause
6f91c3cb1SSiva Durga Prasad Paladugu  */
7f91c3cb1SSiva Durga Prasad Paladugu 
85a8ffeabSTejas Patel #include <assert.h>
901a326abSPrasad Kummari 
1009d40e0eSAntonio Nino Diaz #include <common/debug.h>
1109d40e0eSAntonio Nino Diaz #include <lib/mmio.h>
1209d40e0eSAntonio Nino Diaz #include <lib/psci/psci.h>
130abf4bbaSSaeed Nowshadi #include <plat/arm/common/plat_arm.h>
1401a326abSPrasad Kummari #include <plat/common/platform.h>
1501a326abSPrasad Kummari #include <plat_arm.h>
1609d40e0eSAntonio Nino Diaz 
17*88ee0816SJay Buddhabhatti #include "drivers/delay_timer.h"
1801a326abSPrasad Kummari #include <plat_private.h>
19394a65aaSTejas Patel #include "pm_api_sys.h"
20394a65aaSTejas Patel #include "pm_client.h"
2101a326abSPrasad Kummari #include <pm_common.h>
22*88ee0816SJay Buddhabhatti #include "pm_ipi.h"
23*88ee0816SJay Buddhabhatti #include "pm_svc_main.h"
24394a65aaSTejas Patel 
25f91c3cb1SSiva Durga Prasad Paladugu static uintptr_t versal_sec_entry;
26f91c3cb1SSiva Durga Prasad Paladugu 
27912b7a6fSVenkatesh Yadav Abbarapu static int32_t versal_pwr_domain_on(u_register_t mpidr)
28f91c3cb1SSiva Durga Prasad Paladugu {
29912b7a6fSVenkatesh Yadav Abbarapu 	int32_t cpu_id = plat_core_pos_by_mpidr(mpidr);
30394a65aaSTejas Patel 	const struct pm_proc *proc;
31f91c3cb1SSiva Durga Prasad Paladugu 
32f91c3cb1SSiva Durga Prasad Paladugu 	VERBOSE("%s: mpidr: 0x%lx\n", __func__, mpidr);
33f91c3cb1SSiva Durga Prasad Paladugu 
34b9fa2d9fSAbhyuday Godhasara 	if (cpu_id == -1) {
35f91c3cb1SSiva Durga Prasad Paladugu 		return PSCI_E_INTERN_FAIL;
36b9fa2d9fSAbhyuday Godhasara 	}
37f91c3cb1SSiva Durga Prasad Paladugu 
38912b7a6fSVenkatesh Yadav Abbarapu 	proc = pm_get_proc((uint32_t)cpu_id);
39f91c3cb1SSiva Durga Prasad Paladugu 
40394a65aaSTejas Patel 	/* Send request to PMC to wake up selected ACPU core */
41526a1fd1SAbhyuday Godhasara 	(void)pm_req_wakeup(proc->node_id, (versal_sec_entry & 0xFFFFFFFFU) | 0x1U,
424697164aSTejas Patel 			    versal_sec_entry >> 32, 0, SECURE_FLAG);
43f91c3cb1SSiva Durga Prasad Paladugu 
44394a65aaSTejas Patel 	/* Clear power down request */
45394a65aaSTejas Patel 	pm_client_wakeup(proc);
46f91c3cb1SSiva Durga Prasad Paladugu 
47f91c3cb1SSiva Durga Prasad Paladugu 	return PSCI_E_SUCCESS;
48f91c3cb1SSiva Durga Prasad Paladugu }
49f91c3cb1SSiva Durga Prasad Paladugu 
505a8ffeabSTejas Patel /**
515a8ffeabSTejas Patel  * versal_pwr_domain_suspend() - This function sends request to PMC to suspend
525a8ffeabSTejas Patel  *                               core.
53de7ed953SPrasad Kummari  * @target_state: Targated state.
545a8ffeabSTejas Patel  *
555a8ffeabSTejas Patel  */
565a8ffeabSTejas Patel static void versal_pwr_domain_suspend(const psci_power_state_t *target_state)
575a8ffeabSTejas Patel {
58912b7a6fSVenkatesh Yadav Abbarapu 	uint32_t state;
59912b7a6fSVenkatesh Yadav Abbarapu 	uint32_t cpu_id = plat_my_core_pos();
605a8ffeabSTejas Patel 	const struct pm_proc *proc = pm_get_proc(cpu_id);
615a8ffeabSTejas Patel 
620623dceaSAbhyuday Godhasara 	for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) {
635a8ffeabSTejas Patel 		VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
645a8ffeabSTejas Patel 			__func__, i, target_state->pwr_domain_state[i]);
65b9fa2d9fSAbhyuday Godhasara 	}
665a8ffeabSTejas Patel 
675a8ffeabSTejas Patel 	plat_versal_gic_cpuif_disable();
685a8ffeabSTejas Patel 
69d4c7b550SRavi Patel 	if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
705a8ffeabSTejas Patel 		plat_versal_gic_save();
71d4c7b550SRavi Patel 	}
725a8ffeabSTejas Patel 
735a8ffeabSTejas Patel 	state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ?
745a8ffeabSTejas Patel 		PM_STATE_SUSPEND_TO_RAM : PM_STATE_CPU_IDLE;
755a8ffeabSTejas Patel 
765a8ffeabSTejas Patel 	/* Send request to PMC to suspend this core */
77526a1fd1SAbhyuday Godhasara 	(void)pm_self_suspend(proc->node_id, MAX_LATENCY, state, versal_sec_entry,
784697164aSTejas Patel 			      SECURE_FLAG);
795a8ffeabSTejas Patel 
805a8ffeabSTejas Patel 	/* APU is to be turned off */
815a8ffeabSTejas Patel 	if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
825a8ffeabSTejas Patel 		/* disable coherency */
835a8ffeabSTejas Patel 		plat_arm_interconnect_exit_coherency();
845a8ffeabSTejas Patel 	}
855a8ffeabSTejas Patel }
865a8ffeabSTejas Patel 
875a8ffeabSTejas Patel /**
885a8ffeabSTejas Patel  * versal_pwr_domain_suspend_finish() - This function performs actions to finish
895a8ffeabSTejas Patel  *                                      suspend procedure.
90de7ed953SPrasad Kummari  * @target_state: Targated state.
915a8ffeabSTejas Patel  *
925a8ffeabSTejas Patel  */
935a8ffeabSTejas Patel static void versal_pwr_domain_suspend_finish(
945a8ffeabSTejas Patel 					const psci_power_state_t *target_state)
955a8ffeabSTejas Patel {
96912b7a6fSVenkatesh Yadav Abbarapu 	uint32_t cpu_id = plat_my_core_pos();
975a8ffeabSTejas Patel 	const struct pm_proc *proc = pm_get_proc(cpu_id);
985a8ffeabSTejas Patel 
990623dceaSAbhyuday Godhasara 	for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) {
1005a8ffeabSTejas Patel 		VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
1015a8ffeabSTejas Patel 			__func__, i, target_state->pwr_domain_state[i]);
102b9fa2d9fSAbhyuday Godhasara 	}
1035a8ffeabSTejas Patel 
1045a8ffeabSTejas Patel 	/* Clear the APU power control register for this cpu */
1055a8ffeabSTejas Patel 	pm_client_wakeup(proc);
1065a8ffeabSTejas Patel 
1075a8ffeabSTejas Patel 	/* enable coherency */
1085a8ffeabSTejas Patel 	plat_arm_interconnect_enter_coherency();
1095a8ffeabSTejas Patel 
1105a8ffeabSTejas Patel 	/* APU was turned off, so restore GIC context */
1115a8ffeabSTejas Patel 	if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
1125a8ffeabSTejas Patel 		plat_versal_gic_resume();
1135a8ffeabSTejas Patel 	}
114d4c7b550SRavi Patel 
115d4c7b550SRavi Patel 	plat_versal_gic_cpuif_enable();
1165a8ffeabSTejas Patel }
1175a8ffeabSTejas Patel 
118f91c3cb1SSiva Durga Prasad Paladugu void versal_pwr_domain_on_finish(const psci_power_state_t *target_state)
119f91c3cb1SSiva Durga Prasad Paladugu {
120f91c3cb1SSiva Durga Prasad Paladugu 	/* Enable the gic cpu interface */
121f91c3cb1SSiva Durga Prasad Paladugu 	plat_versal_gic_pcpu_init();
122f91c3cb1SSiva Durga Prasad Paladugu 
123f91c3cb1SSiva Durga Prasad Paladugu 	/* Program the gic per-cpu distributor or re-distributor interface */
124f91c3cb1SSiva Durga Prasad Paladugu 	plat_versal_gic_cpuif_enable();
125f91c3cb1SSiva Durga Prasad Paladugu }
126f91c3cb1SSiva Durga Prasad Paladugu 
1275a8ffeabSTejas Patel /**
128de7ed953SPrasad Kummari  * versal_system_off() - This function sends the system off request to firmware.
129de7ed953SPrasad Kummari  *                       This function does not return.
130de7ed953SPrasad Kummari  *
1310abf4bbaSSaeed Nowshadi  */
1320abf4bbaSSaeed Nowshadi static void __dead2 versal_system_off(void)
1330abf4bbaSSaeed Nowshadi {
1340abf4bbaSSaeed Nowshadi 	/* Send the power down request to the PMC */
135526a1fd1SAbhyuday Godhasara 	(void)pm_system_shutdown(XPM_SHUTDOWN_TYPE_SHUTDOWN,
1364697164aSTejas Patel 				 pm_get_shutdown_scope(), SECURE_FLAG);
1370abf4bbaSSaeed Nowshadi 
138b9fa2d9fSAbhyuday Godhasara 	while (1) {
1390abf4bbaSSaeed Nowshadi 		wfi();
1400abf4bbaSSaeed Nowshadi 	}
141b9fa2d9fSAbhyuday Godhasara }
1420abf4bbaSSaeed Nowshadi 
1430abf4bbaSSaeed Nowshadi /**
144de7ed953SPrasad Kummari  * versal_system_reset() - This function sends the reset request to firmware
145de7ed953SPrasad Kummari  *                         for the system to reset.  This function does not
146de7ed953SPrasad Kummari  *			   return.
147de7ed953SPrasad Kummari  *
1480abf4bbaSSaeed Nowshadi  */
1490abf4bbaSSaeed Nowshadi static void __dead2 versal_system_reset(void)
1500abf4bbaSSaeed Nowshadi {
151*88ee0816SJay Buddhabhatti 	uint32_t ret, timeout = 10000U;
152*88ee0816SJay Buddhabhatti 
153*88ee0816SJay Buddhabhatti 	request_cpu_pwrdwn();
154*88ee0816SJay Buddhabhatti 
155*88ee0816SJay Buddhabhatti 	/*
156*88ee0816SJay Buddhabhatti 	 * Send the system reset request to the firmware if power down request
157*88ee0816SJay Buddhabhatti 	 * is not received from firmware.
158*88ee0816SJay Buddhabhatti 	 */
159*88ee0816SJay Buddhabhatti 	if (!pwrdwn_req_received) {
160526a1fd1SAbhyuday Godhasara 		(void)pm_system_shutdown(XPM_SHUTDOWN_TYPE_RESET,
1614697164aSTejas Patel 					 pm_get_shutdown_scope(), SECURE_FLAG);
1620abf4bbaSSaeed Nowshadi 
163*88ee0816SJay Buddhabhatti 		/*
164*88ee0816SJay Buddhabhatti 		 * Wait for system shutdown request completed and idle callback
165*88ee0816SJay Buddhabhatti 		 * not received.
166*88ee0816SJay Buddhabhatti 		 */
167*88ee0816SJay Buddhabhatti 		do {
168*88ee0816SJay Buddhabhatti 			ret = ipi_mb_enquire_status(primary_proc->ipi->local_ipi_id,
169*88ee0816SJay Buddhabhatti 						    primary_proc->ipi->remote_ipi_id);
170*88ee0816SJay Buddhabhatti 			udelay(100);
171*88ee0816SJay Buddhabhatti 			timeout--;
172*88ee0816SJay Buddhabhatti 		} while ((ret != IPI_MB_STATUS_RECV_PENDING) && (timeout > 0U));
173*88ee0816SJay Buddhabhatti 	}
174*88ee0816SJay Buddhabhatti 
175*88ee0816SJay Buddhabhatti 	(void)psci_cpu_off();
176*88ee0816SJay Buddhabhatti 
177b9fa2d9fSAbhyuday Godhasara 	while (1) {
1780abf4bbaSSaeed Nowshadi 		wfi();
1790abf4bbaSSaeed Nowshadi 	}
180b9fa2d9fSAbhyuday Godhasara }
1810abf4bbaSSaeed Nowshadi 
1820abf4bbaSSaeed Nowshadi /**
183de7ed953SPrasad Kummari  * versal_pwr_domain_off() - This function performs actions to turn off core.
184de7ed953SPrasad Kummari  * @target_state: Targated state.
1855a8ffeabSTejas Patel  *
1865a8ffeabSTejas Patel  */
1875a8ffeabSTejas Patel static void versal_pwr_domain_off(const psci_power_state_t *target_state)
1885a8ffeabSTejas Patel {
189912b7a6fSVenkatesh Yadav Abbarapu 	uint32_t cpu_id = plat_my_core_pos();
1905a8ffeabSTejas Patel 	const struct pm_proc *proc = pm_get_proc(cpu_id);
1915a8ffeabSTejas Patel 
1920623dceaSAbhyuday Godhasara 	for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) {
1935a8ffeabSTejas Patel 		VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
1945a8ffeabSTejas Patel 			__func__, i, target_state->pwr_domain_state[i]);
195b9fa2d9fSAbhyuday Godhasara 	}
1965a8ffeabSTejas Patel 
1975a8ffeabSTejas Patel 	/* Prevent interrupts from spuriously waking up this cpu */
1985a8ffeabSTejas Patel 	plat_versal_gic_cpuif_disable();
1995a8ffeabSTejas Patel 
2005a8ffeabSTejas Patel 	/*
2015a8ffeabSTejas Patel 	 * Send request to PMC to power down the appropriate APU CPU
2025a8ffeabSTejas Patel 	 * core.
2035a8ffeabSTejas Patel 	 * According to PSCI specification, CPU_off function does not
2045a8ffeabSTejas Patel 	 * have resume address and CPU core can only be woken up
2055a8ffeabSTejas Patel 	 * invoking CPU_on function, during which resume address will
2065a8ffeabSTejas Patel 	 * be set.
2075a8ffeabSTejas Patel 	 */
208526a1fd1SAbhyuday Godhasara 	(void)pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_IDLE, 0,
2094697164aSTejas Patel 			      SECURE_FLAG);
2105a8ffeabSTejas Patel }
2115a8ffeabSTejas Patel 
2125a8ffeabSTejas Patel /**
2135a8ffeabSTejas Patel  * versal_validate_power_state() - This function ensures that the power state
2145a8ffeabSTejas Patel  *                                 parameter in request is valid.
215de7ed953SPrasad Kummari  * @power_state: Power state of core.
216de7ed953SPrasad Kummari  * @req_state: Requested state.
2175a8ffeabSTejas Patel  *
218de7ed953SPrasad Kummari  * Return: Returns status, either success or reason.
2195a8ffeabSTejas Patel  *
2205a8ffeabSTejas Patel  */
221912b7a6fSVenkatesh Yadav Abbarapu static int32_t versal_validate_power_state(uint32_t power_state,
2225a8ffeabSTejas Patel 				       psci_power_state_t *req_state)
2235a8ffeabSTejas Patel {
2245a8ffeabSTejas Patel 	VERBOSE("%s: power_state: 0x%x\n", __func__, power_state);
2255a8ffeabSTejas Patel 
226912b7a6fSVenkatesh Yadav Abbarapu 	uint32_t pstate = psci_get_pstate_type(power_state);
2275a8ffeabSTejas Patel 
2285a8ffeabSTejas Patel 	assert(req_state);
2295a8ffeabSTejas Patel 
2305a8ffeabSTejas Patel 	/* Sanity check the requested state */
231b9fa2d9fSAbhyuday Godhasara 	if (pstate == PSTATE_TYPE_STANDBY) {
2325a8ffeabSTejas Patel 		req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE;
233b9fa2d9fSAbhyuday Godhasara 	} else {
2345a8ffeabSTejas Patel 		req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE;
235b9fa2d9fSAbhyuday Godhasara 	}
2365a8ffeabSTejas Patel 
2375a8ffeabSTejas Patel 	/* We expect the 'state id' to be zero */
238a62c40d4SAbhyuday Godhasara 	if (psci_get_pstate_id(power_state) != 0U) {
2395a8ffeabSTejas Patel 		return PSCI_E_INVALID_PARAMS;
240b9fa2d9fSAbhyuday Godhasara 	}
2415a8ffeabSTejas Patel 
2425a8ffeabSTejas Patel 	return PSCI_E_SUCCESS;
2435a8ffeabSTejas Patel }
2445a8ffeabSTejas Patel 
2455a8ffeabSTejas Patel /**
246de7ed953SPrasad Kummari  * versal_get_sys_suspend_power_state() - Get power state for system suspend.
247de7ed953SPrasad Kummari  * @req_state: Requested state.
2485a8ffeabSTejas Patel  *
2495a8ffeabSTejas Patel  */
2505a8ffeabSTejas Patel static void versal_get_sys_suspend_power_state(psci_power_state_t *req_state)
2515a8ffeabSTejas Patel {
2525a8ffeabSTejas Patel 	req_state->pwr_domain_state[PSCI_CPU_PWR_LVL] = PLAT_MAX_OFF_STATE;
2535a8ffeabSTejas Patel 	req_state->pwr_domain_state[1] = PLAT_MAX_OFF_STATE;
2545a8ffeabSTejas Patel }
2555a8ffeabSTejas Patel 
256f91c3cb1SSiva Durga Prasad Paladugu static const struct plat_psci_ops versal_nopmc_psci_ops = {
257394a65aaSTejas Patel 	.pwr_domain_on			= versal_pwr_domain_on,
2585a8ffeabSTejas Patel 	.pwr_domain_off			= versal_pwr_domain_off,
259f91c3cb1SSiva Durga Prasad Paladugu 	.pwr_domain_on_finish		= versal_pwr_domain_on_finish,
2605a8ffeabSTejas Patel 	.pwr_domain_suspend		= versal_pwr_domain_suspend,
2615a8ffeabSTejas Patel 	.pwr_domain_suspend_finish	= versal_pwr_domain_suspend_finish,
2620abf4bbaSSaeed Nowshadi 	.system_off			= versal_system_off,
2630abf4bbaSSaeed Nowshadi 	.system_reset			= versal_system_reset,
2645a8ffeabSTejas Patel 	.validate_power_state		= versal_validate_power_state,
2655a8ffeabSTejas Patel 	.get_sys_suspend_power_state	= versal_get_sys_suspend_power_state,
266f91c3cb1SSiva Durga Prasad Paladugu };
267f91c3cb1SSiva Durga Prasad Paladugu 
268f91c3cb1SSiva Durga Prasad Paladugu /*******************************************************************************
269f91c3cb1SSiva Durga Prasad Paladugu  * Export the platform specific power ops.
270f91c3cb1SSiva Durga Prasad Paladugu  ******************************************************************************/
271f7c48d9eSVenkatesh Yadav Abbarapu int32_t plat_setup_psci_ops(uintptr_t sec_entrypoint,
272f91c3cb1SSiva Durga Prasad Paladugu 			const struct plat_psci_ops **psci_ops)
273f91c3cb1SSiva Durga Prasad Paladugu {
274f91c3cb1SSiva Durga Prasad Paladugu 	versal_sec_entry = sec_entrypoint;
275f91c3cb1SSiva Durga Prasad Paladugu 
276f91c3cb1SSiva Durga Prasad Paladugu 	*psci_ops = &versal_nopmc_psci_ops;
277f91c3cb1SSiva Durga Prasad Paladugu 
278f91c3cb1SSiva Durga Prasad Paladugu 	return 0;
279f91c3cb1SSiva Durga Prasad Paladugu }
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