1 /* 2 * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <errno.h> 9 #include <plat_arm.h> 10 #include <plat_private.h> 11 #include <bl31/bl31.h> 12 #include <common/bl_common.h> 13 #include <common/debug.h> 14 #include <drivers/arm/pl011.h> 15 #include <drivers/console.h> 16 #include <lib/mmio.h> 17 #include <lib/xlat_tables/xlat_tables.h> 18 #include <plat/common/platform.h> 19 #include <versal_def.h> 20 #include <plat_private.h> 21 #include <plat_startup.h> 22 23 static entry_point_info_t bl32_image_ep_info; 24 static entry_point_info_t bl33_image_ep_info; 25 static console_t versal_runtime_console; 26 27 /* 28 * Return a pointer to the 'entry_point_info' structure of the next image for 29 * the security state specified. BL33 corresponds to the non-secure image type 30 * while BL32 corresponds to the secure image type. A NULL pointer is returned 31 * if the image does not exist. 32 */ 33 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) 34 { 35 assert(sec_state_is_valid(type)); 36 37 if (type == NON_SECURE) { 38 return &bl33_image_ep_info; 39 } 40 41 return &bl32_image_ep_info; 42 } 43 44 /* 45 * Set the build time defaults,if we can't find any config data. 46 */ 47 static inline void bl31_set_default_config(void) 48 { 49 bl32_image_ep_info.pc = BL32_BASE; 50 bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry(); 51 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); 52 bl33_image_ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX, 53 DISABLE_ALL_EXCEPTIONS); 54 } 55 56 /* 57 * Perform any BL31 specific platform actions. Here is an opportunity to copy 58 * parameters passed by the calling EL (S-EL1 in BL2 & S-EL3 in BL1) before they 59 * are lost (potentially). This needs to be done before the MMU is initialized 60 * so that the memory layout can be used while creating page tables. 61 */ 62 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 63 u_register_t arg2, u_register_t arg3) 64 { 65 uint64_t atf_handoff_addr; 66 67 /* Initialize the console to provide early debug support */ 68 int rc = console_pl011_register(VERSAL_UART_BASE, 69 VERSAL_UART_CLOCK, 70 VERSAL_UART_BAUDRATE, 71 &versal_runtime_console); 72 if (rc == 0) { 73 panic(); 74 } 75 76 console_set_scope(&versal_runtime_console, CONSOLE_FLAG_BOOT | 77 CONSOLE_FLAG_RUNTIME); 78 79 /* Initialize the platform config for future decision making */ 80 versal_config_setup(); 81 /* There are no parameters from BL2 if BL31 is a reset vector */ 82 assert(arg0 == 0U); 83 assert(arg1 == 0U); 84 85 /* 86 * Do initial security configuration to allow DRAM/device access. On 87 * Base VERSAL only DRAM security is programmable (via TrustZone), but 88 * other platforms might have more programmable security devices 89 * present. 90 */ 91 92 /* Populate common information for BL32 and BL33 */ 93 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); 94 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); 95 SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); 96 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); 97 98 atf_handoff_addr = mmio_read_32(PMC_GLOBAL_GLOB_GEN_STORAGE4); 99 enum fsbl_handoff ret = fsbl_atf_handover(&bl32_image_ep_info, 100 &bl33_image_ep_info, 101 atf_handoff_addr); 102 if (ret == FSBL_HANDOFF_NO_STRUCT || ret == FSBL_HANDOFF_INVAL_STRUCT) { 103 bl31_set_default_config(); 104 } else if (ret != FSBL_HANDOFF_SUCCESS) { 105 panic(); 106 } 107 108 NOTICE("BL31: Secure code at 0x%lx\n", bl32_image_ep_info.pc); 109 NOTICE("BL31: Non secure code at 0x%lx\n", bl33_image_ep_info.pc); 110 } 111 112 void bl31_platform_setup(void) 113 { 114 /* Initialize the gic cpu and distributor interfaces */ 115 plat_versal_gic_driver_init(); 116 plat_versal_gic_init(); 117 } 118 119 void bl31_plat_runtime_setup(void) 120 { 121 } 122 123 /* 124 * Perform the very early platform specific architectural setup here. 125 */ 126 void bl31_plat_arch_setup(void) 127 { 128 plat_arm_interconnect_init(); 129 plat_arm_interconnect_enter_coherency(); 130 131 const mmap_region_t bl_regions[] = { 132 MAP_REGION_FLAT(BL31_BASE, BL31_END - BL31_BASE, 133 MT_MEMORY | MT_RW | MT_SECURE), 134 MAP_REGION_FLAT(BL_CODE_BASE, BL_CODE_END - BL_CODE_BASE, 135 MT_CODE | MT_SECURE), 136 MAP_REGION_FLAT(BL_RO_DATA_BASE, BL_RO_DATA_END - BL_RO_DATA_BASE, 137 MT_RO_DATA | MT_SECURE), 138 MAP_REGION_FLAT(BL_COHERENT_RAM_BASE, 139 BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE, 140 MT_DEVICE | MT_RW | MT_SECURE), 141 {0} 142 }; 143 144 setup_page_tables(bl_regions, plat_versal_get_mmap()); 145 enable_mmu_el3(0); 146 } 147