xref: /rk3399_ARM-atf/plat/xilinx/versal/bl31_versal_setup.c (revision 6f7dba4b24ee8e6c134a5237b5af461c9898501e)
1 /*
2  * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <assert.h>
8 #include <bl_common.h>
9 #include <bl31.h>
10 #include <console.h>
11 #include <debug.h>
12 #include <errno.h>
13 #include <platform.h>
14 #include <pl011.h>
15 #include <xlat_tables.h>
16 #include "versal_private.h"
17 
18 static entry_point_info_t bl32_image_ep_info;
19 static entry_point_info_t bl33_image_ep_info;
20 static console_pl011_t versal_runtime_console;
21 
22 /*
23  * Return a pointer to the 'entry_point_info' structure of the next image for
24  * the security state specified. BL33 corresponds to the non-secure image type
25  * while BL32 corresponds to the secure image type. A NULL pointer is returned
26  * if the image does not exist.
27  */
28 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
29 {
30 	assert(sec_state_is_valid(type));
31 
32 	if (type == NON_SECURE)
33 		return &bl33_image_ep_info;
34 
35 	return &bl32_image_ep_info;
36 }
37 
38 /*
39  * Perform any BL31 specific platform actions. Here is an opportunity to copy
40  * parameters passed by the calling EL (S-EL1 in BL2 & S-EL3 in BL1) before they
41  * are lost (potentially). This needs to be done before the MMU is initialized
42  * so that the memory layout can be used while creating page tables.
43  */
44 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
45 				u_register_t arg2, u_register_t arg3)
46 {
47 
48 	/* Initialize the console to provide early debug support */
49 	int rc = console_pl011_register(VERSAL_UART_BASE,
50 					VERSAL_UART_CLOCK,
51 					VERSAL_UART_BAUDRATE,
52 					&versal_runtime_console);
53 	if (rc == 0)
54 		panic();
55 
56 	console_set_scope(&versal_runtime_console.console, CONSOLE_FLAG_BOOT |
57 			  CONSOLE_FLAG_RUNTIME);
58 
59 	/* Initialize the platform config for future decision making */
60 	versal_config_setup();
61 	/* There are no parameters from BL2 if BL31 is a reset vector */
62 	assert(arg0 == 0U);
63 	assert(arg1 == 0U);
64 
65 	/*
66 	 * Do initial security configuration to allow DRAM/device access. On
67 	 * Base VERSAL only DRAM security is programmable (via TrustZone), but
68 	 * other platforms might have more programmable security devices
69 	 * present.
70 	 */
71 
72 	/* Populate common information for BL32 and BL33 */
73 	SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0);
74 	SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
75 	SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0);
76 	SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE);
77 
78 	/* use build time defaults in JTAG boot mode */
79 	bl32_image_ep_info.pc = BL32_BASE;
80 	bl32_image_ep_info.spsr = 0;
81 	bl33_image_ep_info.pc = plat_get_ns_image_entrypoint();
82 	bl33_image_ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
83 					  DISABLE_ALL_EXCEPTIONS);
84 
85 	NOTICE("BL31: Secure code at 0x%lx\n", bl32_image_ep_info.pc);
86 	NOTICE("BL31: Non secure code at 0x%lx\n", bl33_image_ep_info.pc);
87 }
88 
89 void bl31_platform_setup(void)
90 {
91 	/* Initialize the gic cpu and distributor interfaces */
92 	plat_versal_gic_driver_init();
93 	plat_versal_gic_init();
94 }
95 
96 void bl31_plat_runtime_setup(void)
97 {
98 }
99 
100 /*
101  * Perform the very early platform specific architectural setup here.
102  */
103 void bl31_plat_arch_setup(void)
104 {
105 	const mmap_region_t bl_regions[] = {
106 		MAP_REGION_FLAT(BL31_BASE, BL31_END - BL31_BASE,
107 			MT_MEMORY | MT_RW | MT_SECURE),
108 		MAP_REGION_FLAT(BL_CODE_BASE, BL_CODE_END - BL_CODE_BASE,
109 				MT_CODE | MT_SECURE),
110 		MAP_REGION_FLAT(BL_RO_DATA_BASE, BL_RO_DATA_END - BL_RO_DATA_BASE,
111 				MT_RO_DATA | MT_SECURE),
112 		MAP_REGION_FLAT(BL_COHERENT_RAM_BASE,
113 				BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE,
114 				MT_DEVICE | MT_RW | MT_SECURE),
115 		{0}
116 	};
117 
118 	setup_page_tables(bl_regions, plat_versal_get_mmap());
119 	enable_mmu_el3(0);
120 }
121