1f91c3cb1SSiva Durga Prasad Paladugu /* 231ce893eSVenkatesh Yadav Abbarapu * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved. 3d6760c4dSAkshay Belsare * Copyright (C) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. 4f91c3cb1SSiva Durga Prasad Paladugu * 5f91c3cb1SSiva Durga Prasad Paladugu * SPDX-License-Identifier: BSD-3-Clause 6f91c3cb1SSiva Durga Prasad Paladugu */ 7f91c3cb1SSiva Durga Prasad Paladugu 8c73a90e5STejas Patel #include <plat_ipi.h> 9ab36d097STejas Patel #include <versal_def.h> 10d4821739STejas Patel #include <plat_private.h> 1109d40e0eSAntonio Nino Diaz #include <common/debug.h> 1209d40e0eSAntonio Nino Diaz #include <drivers/generic_delay_timer.h> 1309d40e0eSAntonio Nino Diaz #include <lib/mmio.h> 14*0e9f54e5SMichal Simek #include <lib/xlat_tables/xlat_tables_v2.h> 1509d40e0eSAntonio Nino Diaz #include <plat/common/platform.h> 16f91c3cb1SSiva Durga Prasad Paladugu 17f91c3cb1SSiva Durga Prasad Paladugu /* 18f91c3cb1SSiva Durga Prasad Paladugu * Table of regions to map using the MMU. 19f91c3cb1SSiva Durga Prasad Paladugu * This doesn't include TZRAM as the 'mem_layout' argument passed to 20f91c3cb1SSiva Durga Prasad Paladugu * configure_mmu_elx() will give the available subset of that, 21f91c3cb1SSiva Durga Prasad Paladugu */ 22f91c3cb1SSiva Durga Prasad Paladugu const mmap_region_t plat_versal_mmap[] = { 23f91c3cb1SSiva Durga Prasad Paladugu MAP_REGION_FLAT(DEVICE0_BASE, DEVICE0_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 24f91c3cb1SSiva Durga Prasad Paladugu MAP_REGION_FLAT(DEVICE1_BASE, DEVICE1_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 25f91c3cb1SSiva Durga Prasad Paladugu MAP_REGION_FLAT(CRF_BASE, CRF_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 265a8ffeabSTejas Patel MAP_REGION_FLAT(FPD_MAINCCI_BASE, FPD_MAINCCI_SIZE, MT_DEVICE | MT_RW | 275a8ffeabSTejas Patel MT_SECURE), 28f91c3cb1SSiva Durga Prasad Paladugu { 0 } 29f91c3cb1SSiva Durga Prasad Paladugu }; 30f91c3cb1SSiva Durga Prasad Paladugu 31f91c3cb1SSiva Durga Prasad Paladugu const mmap_region_t *plat_versal_get_mmap(void) 32f91c3cb1SSiva Durga Prasad Paladugu { 33f91c3cb1SSiva Durga Prasad Paladugu return plat_versal_mmap; 34f91c3cb1SSiva Durga Prasad Paladugu } 35f91c3cb1SSiva Durga Prasad Paladugu 36f91c3cb1SSiva Durga Prasad Paladugu static void versal_print_platform_name(void) 37f91c3cb1SSiva Durga Prasad Paladugu { 38d6760c4dSAkshay Belsare NOTICE("TF-A running on %s\n", PLATFORM_NAME); 39f91c3cb1SSiva Durga Prasad Paladugu } 40f91c3cb1SSiva Durga Prasad Paladugu 41f91c3cb1SSiva Durga Prasad Paladugu void versal_config_setup(void) 42f91c3cb1SSiva Durga Prasad Paladugu { 43c73a90e5STejas Patel /* Configure IPI data for versal */ 44c73a90e5STejas Patel versal_ipi_config_table_init(); 45c73a90e5STejas Patel 46f91c3cb1SSiva Durga Prasad Paladugu versal_print_platform_name(); 47f91c3cb1SSiva Durga Prasad Paladugu 48f91c3cb1SSiva Durga Prasad Paladugu generic_delay_timer_init(); 49f91c3cb1SSiva Durga Prasad Paladugu } 50f91c3cb1SSiva Durga Prasad Paladugu 51912b7a6fSVenkatesh Yadav Abbarapu uint32_t plat_get_syscnt_freq2(void) 52f91c3cb1SSiva Durga Prasad Paladugu { 53f91c3cb1SSiva Durga Prasad Paladugu return VERSAL_CPU_CLOCK; 54f91c3cb1SSiva Durga Prasad Paladugu } 55f91c3cb1SSiva Durga Prasad Paladugu 56