14c7abf85SPrasad Kummari /* 2*470dd8b4SHarrison Mutai * Copyright (c) 2014-2025, Arm Limited and Contributors. All rights reserved. 34c7abf85SPrasad Kummari * Copyright (c) 2023, Advanced Micro Devices. All rights reserved. 44c7abf85SPrasad Kummari * 54c7abf85SPrasad Kummari * SPDX-License-Identifier: BSD-3-Clause 64c7abf85SPrasad Kummari */ 74c7abf85SPrasad Kummari 84c7abf85SPrasad Kummari #include <common/bl_common.h> 94c7abf85SPrasad Kummari #include <common/debug.h> 107ff4d4fbSPrasad Kummari #include <drivers/arm/pl011.h> 114c7abf85SPrasad Kummari #include <drivers/console.h> 124c7abf85SPrasad Kummari #include <plat/arm/common/plat_arm.h> 134c7abf85SPrasad Kummari #include <platform_tsp.h> 144c7abf85SPrasad Kummari 154c7abf85SPrasad Kummari #include <plat_private.h> 164c7abf85SPrasad Kummari 174c7abf85SPrasad Kummari /******************************************************************************* 184c7abf85SPrasad Kummari * Initialize the UART 194c7abf85SPrasad Kummari ******************************************************************************/ 20*470dd8b4SHarrison Mutai void tsp_early_platform_setup(u_register_t arg0, u_register_t arg1, 21*470dd8b4SHarrison Mutai u_register_t arg2, u_register_t arg3) 224c7abf85SPrasad Kummari { 234c7abf85SPrasad Kummari /* 244c7abf85SPrasad Kummari * Register a different console than already in use to display 254c7abf85SPrasad Kummari * messages from TSP 264c7abf85SPrasad Kummari */ 274c7abf85SPrasad Kummari static console_t tsp_boot_console; 284c7abf85SPrasad Kummari int32_t rc; 294c7abf85SPrasad Kummari 307ff4d4fbSPrasad Kummari #if defined(PLAT_zynqmp) 314c7abf85SPrasad Kummari rc = console_cdns_register((uintptr_t)UART_BASE, 324c7abf85SPrasad Kummari (uint32_t)get_uart_clk(), 334c7abf85SPrasad Kummari (uint32_t)UART_BAUDRATE, 344c7abf85SPrasad Kummari &tsp_boot_console); 357ff4d4fbSPrasad Kummari #else 367ff4d4fbSPrasad Kummari rc = console_pl011_register((uintptr_t)UART_BASE, 377ff4d4fbSPrasad Kummari (uint32_t)get_uart_clk(), 387ff4d4fbSPrasad Kummari (uint32_t)UART_BAUDRATE, 397ff4d4fbSPrasad Kummari &tsp_boot_console); 407ff4d4fbSPrasad Kummari #endif 417ff4d4fbSPrasad Kummari 424c7abf85SPrasad Kummari if (rc == 0) { 434c7abf85SPrasad Kummari panic(); 444c7abf85SPrasad Kummari } 454c7abf85SPrasad Kummari 464c7abf85SPrasad Kummari console_set_scope(&tsp_boot_console, 474c7abf85SPrasad Kummari CONSOLE_FLAG_RUNTIME | CONSOLE_FLAG_BOOT); 484c7abf85SPrasad Kummari } 494c7abf85SPrasad Kummari 504c7abf85SPrasad Kummari /******************************************************************************* 514c7abf85SPrasad Kummari * Perform platform specific setup placeholder 524c7abf85SPrasad Kummari ******************************************************************************/ 534c7abf85SPrasad Kummari void tsp_platform_setup(void) 544c7abf85SPrasad Kummari { 557ff4d4fbSPrasad Kummari /* 567ff4d4fbSPrasad Kummari * For ZynqMP, the GICv2 driver needs to be initialized in S-EL1, 577ff4d4fbSPrasad Kummari * and for other platforms, the GICv3 driver is initialized in EL3. 587ff4d4fbSPrasad Kummari * This is because S-EL1 can use GIC system registers to manage 597ff4d4fbSPrasad Kummari * interrupts and does not need to be initialized again in SEL1. 607ff4d4fbSPrasad Kummari */ 617ff4d4fbSPrasad Kummari #if defined(PLAT_zynqmp) 624c7abf85SPrasad Kummari plat_arm_gic_driver_init(); 634c7abf85SPrasad Kummari plat_arm_gic_init(); 647ff4d4fbSPrasad Kummari #endif 654c7abf85SPrasad Kummari } 664c7abf85SPrasad Kummari 674c7abf85SPrasad Kummari /******************************************************************************* 684c7abf85SPrasad Kummari * Perform the very early platform specific architectural setup here. At the 694c7abf85SPrasad Kummari * moment this is only initializes the MMU 704c7abf85SPrasad Kummari ******************************************************************************/ 714c7abf85SPrasad Kummari void tsp_plat_arch_setup(void) 724c7abf85SPrasad Kummari { 734c7abf85SPrasad Kummari const mmap_region_t bl_regions[] = { 744c7abf85SPrasad Kummari MAP_REGION_FLAT(BL32_BASE, BL32_END - BL32_BASE, 754c7abf85SPrasad Kummari MT_MEMORY | MT_RW | MT_SECURE), 764c7abf85SPrasad Kummari MAP_REGION_FLAT(BL_CODE_BASE, BL_CODE_END - BL_CODE_BASE, 774c7abf85SPrasad Kummari MT_CODE | MT_SECURE), 784c7abf85SPrasad Kummari MAP_REGION_FLAT(BL_RO_DATA_BASE, BL_RO_DATA_END - BL_RO_DATA_BASE, 794c7abf85SPrasad Kummari MT_RO_DATA | MT_SECURE), 80639b3676SPrasad Kummari #if defined(PLAT_zynqmp) || defined(PLAT_versal) 814c7abf85SPrasad Kummari MAP_REGION_FLAT(BL_COHERENT_RAM_BASE, 824c7abf85SPrasad Kummari BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE, 834c7abf85SPrasad Kummari MT_DEVICE | MT_RW | MT_SECURE), 84639b3676SPrasad Kummari #endif 854c7abf85SPrasad Kummari {0} 864c7abf85SPrasad Kummari }; 874c7abf85SPrasad Kummari 884c7abf85SPrasad Kummari setup_page_tables(bl_regions, plat_get_mmap()); 894c7abf85SPrasad Kummari enable_mmu_el1(0); 904c7abf85SPrasad Kummari } 91