xref: /rk3399_ARM-atf/plat/xilinx/common/pm_service/pm_svc_main.c (revision 055c97afb2427092766687253d6ff851ee77455e)
1 /*
2  * Copyright (c) 2019-2022, Xilinx, Inc. All rights reserved.
3  * Copyright (c) 2022-2025, Advanced Micro Devices, Inc. All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 /*
9  * Top-level SMC handler for Versal power management calls and
10  * IPI setup functions for communication with PMC.
11  */
12 
13 #include <errno.h>
14 #include <stdbool.h>
15 
16 #include "../drivers/arm/gic/v3/gicv3_private.h"
17 
18 #include <common/runtime_svc.h>
19 #include <drivers/arm/gicv3.h>
20 #include <lib/psci/psci.h>
21 #include <plat/arm/common/plat_arm.h>
22 #include <plat/common/platform.h>
23 
24 #include <plat_private.h>
25 #include "pm_api_sys.h"
26 #include "pm_client.h"
27 #include "pm_ipi.h"
28 #include "pm_svc_main.h"
29 
30 #define MODE				0x80000000U
31 
32 #define XSCUGIC_SGIR_EL1_INITID_SHIFT    24U
33 #define INVALID_SGI    0xFFU
34 #define PM_INIT_SUSPEND_CB	(30U)
35 #define PM_NOTIFY_CB		(32U)
36 #define EVENT_CPU_PWRDWN	(4U)
37 #define MBOX_SGI_SHARED_IPI	(7U)
38 
39 /**
40  * upper_32_bits - return bits 32-63 of a number
41  * @n: the number we're accessing
42  */
43 #define upper_32_bits(n)	((uint32_t)((n) >> 32U))
44 
45 /**
46  * lower_32_bits - return bits 0-31 of a number
47  * @n: the number we're accessing
48  */
49 #define lower_32_bits(n)	((uint32_t)((n) & 0xffffffffU))
50 
51 /**
52  * EXTRACT_SMC_ARGS - extracts 32-bit payloads from 64-bit SMC arguments
53  * @pm_arg: array of 32-bit payloads
54  * @x: array of 64-bit SMC arguments
55  */
56 #define EXTRACT_ARGS(pm_arg, x)						\
57 	for (uint32_t i = 0U; i < (PAYLOAD_ARG_CNT - 1U); i++) {	\
58 		if ((i % 2U) != 0U) {					\
59 			pm_arg[i] = lower_32_bits(x[(i / 2U) + 1U]);	\
60 		} else {						\
61 			pm_arg[i] = upper_32_bits(x[i / 2U]);		\
62 		}							\
63 	}
64 
65 /* 1 sec of wait timeout for secondary core down */
66 #define PWRDWN_WAIT_TIMEOUT	(1000U)
67 
68 /* pm_up = true - UP, pm_up = false - DOWN */
69 static bool pm_up;
70 static uint32_t sgi = (uint32_t)INVALID_SGI;
71 bool pwrdwn_req_received;
72 
73 static void notify_os(void)
74 {
75 	plat_ic_raise_ns_sgi((int)sgi, read_mpidr_el1());
76 }
77 
78 static uint64_t cpu_pwrdwn_req_handler(uint32_t id, uint32_t flags,
79 				       void *handle, void *cookie)
80 {
81 	(void)id;
82 	(void)flags;
83 	(void)handle;
84 	(void)cookie;
85 	uint32_t cpu_id = plat_my_core_pos();
86 
87 	VERBOSE("Powering down CPU %d\n", cpu_id);
88 
89 	/* Deactivate CPU power down SGI */
90 	plat_ic_end_of_interrupt(CPU_PWR_DOWN_REQ_INTR);
91 
92 	return (uint64_t)psci_cpu_off();
93 }
94 
95 /**
96  * raise_pwr_down_interrupt() - Callback function to raise SGI.
97  * @mpidr: MPIDR for the target CPU.
98  *
99  * Raise SGI interrupt to trigger the CPU power down sequence on all the
100  * online secondary cores.
101  */
102 static void raise_pwr_down_interrupt(u_register_t mpidr)
103 {
104 	plat_ic_raise_el3_sgi((int)CPU_PWR_DOWN_REQ_INTR, mpidr);
105 }
106 
107 void request_cpu_pwrdwn(void)
108 {
109 	int ret;
110 
111 	VERBOSE("CPU power down request received\n");
112 
113 	/* Send powerdown request to online secondary core(s) */
114 	ret = psci_stop_other_cores(plat_my_core_pos(), PWRDWN_WAIT_TIMEOUT,
115 				    raise_pwr_down_interrupt);
116 	if (ret != PSCI_E_SUCCESS) {
117 		ERROR("Failed to powerdown secondary core(s)\n");
118 	}
119 
120 	/* Clear IPI IRQ */
121 	pm_ipi_irq_clear(primary_proc);
122 
123 	/* Deactivate IPI IRQ */
124 	plat_ic_end_of_interrupt(PLAT_VERSAL_IPI_IRQ);
125 }
126 
127 static uint64_t ipi_fiq_handler(uint32_t id, uint32_t flags, void *handle,
128 				void *cookie)
129 {
130 	(void)flags;
131 	(void)handle;
132 	(void)cookie;
133 	uint32_t payload[4] = {0};
134 	enum pm_ret_status ret;
135 	uint32_t ipi_status, i;
136 
137 	VERBOSE("Received IPI FIQ from firmware\n");
138 
139 	console_flush();
140 	(void)plat_ic_acknowledge_interrupt();
141 
142 	/* Check status register for each IPI except PMC */
143 	for (i = IPI_ID_APU; i <= IPI_ID_5; i++) {
144 		ipi_status = ipi_mb_enquire_status(IPI_ID_APU, i);
145 
146 		/* If any agent other than PMC has generated IPI FIQ then send SGI to mbox driver */
147 		if ((ipi_status & IPI_MB_STATUS_RECV_PENDING) != 0U) {
148 			plat_ic_raise_ns_sgi((int)MBOX_SGI_SHARED_IPI, read_mpidr_el1());
149 			break;
150 		}
151 	}
152 
153 	/* If PMC has not generated interrupt then end ISR */
154 	ipi_status = ipi_mb_enquire_status(IPI_ID_APU, IPI_ID_PMC);
155 	if ((ipi_status & IPI_MB_STATUS_RECV_PENDING) == 0U) {
156 		plat_ic_end_of_interrupt(id);
157 		goto exit_label;
158 	}
159 
160 	/* Handle PMC case */
161 	ret = pm_get_callbackdata(payload, ARRAY_SIZE(payload), 0, 0);
162 	if (ret != PM_RET_SUCCESS) {
163 		payload[0] = (uint32_t)ret;
164 	}
165 
166 	switch (payload[0]) {
167 	case PM_INIT_SUSPEND_CB:
168 		if (sgi != INVALID_SGI) {
169 			notify_os();
170 		}
171 		break;
172 	case PM_NOTIFY_CB:
173 		if (sgi != INVALID_SGI) {
174 			if (payload[2] == EVENT_CPU_PWRDWN) {
175 				if (pwrdwn_req_received) {
176 					pwrdwn_req_received = false;
177 					request_cpu_pwrdwn();
178 					(void)psci_cpu_off();
179 					break;
180 				} else {
181 					pwrdwn_req_received = true;
182 				}
183 			}
184 			notify_os();
185 		} else {
186 			if (payload[2] == EVENT_CPU_PWRDWN) {
187 				request_cpu_pwrdwn();
188 				(void)psci_cpu_off();
189 			}
190 		}
191 		break;
192 	case (uint32_t)PM_RET_ERROR_INVALID_CRC:
193 		pm_ipi_irq_clear(primary_proc);
194 		WARN("Invalid CRC in the payload\n");
195 		break;
196 
197 	default:
198 		pm_ipi_irq_clear(primary_proc);
199 		WARN("Invalid IPI payload\n");
200 		break;
201 	}
202 
203 	/* Clear FIQ */
204 	plat_ic_end_of_interrupt(id);
205 
206 exit_label:
207 	return 0;
208 }
209 
210 /**
211  * pm_register_sgi() - PM register the IPI interrupt.
212  * @sgi_num: SGI number to be used for communication.
213  * @reset: Reset to invalid SGI when reset=1.
214  *
215  * Return: On success, the initialization function must return 0.
216  *         Any other return value will cause the framework to ignore
217  *         the service.
218  *
219  * Update the SGI number to be used.
220  *
221  */
222 int32_t pm_register_sgi(uint32_t sgi_num, uint32_t reset)
223 {
224 	int32_t ret = 0;
225 
226 	if (reset == 1U) {
227 		sgi = INVALID_SGI;
228 	} else if (sgi != INVALID_SGI) {
229 		ret = -EBUSY;
230 	} else if (sgi_num >= GICV3_MAX_SGI_TARGETS) {
231 		ret = -EINVAL;
232 	} else {
233 		sgi = (uint32_t)sgi_num;
234 	}
235 
236 	return ret;
237 }
238 
239 /**
240  * pm_setup() - PM service setup.
241  *
242  * Return: On success, the initialization function must return 0.
243  *         Any other return value will cause the framework to ignore
244  *         the service.
245  *
246  * Initialization functions for Versal power management for
247  * communicaton with PMC.
248  *
249  * Called from sip_svc_setup initialization function with the
250  * rt_svc_init signature.
251  *
252  */
253 int32_t pm_setup(void)
254 {
255 	int32_t ret = 0;
256 
257 	pm_ipi_init(primary_proc);
258 	pm_up = true;
259 
260 	/* register SGI handler for CPU power down request */
261 	ret = request_intr_type_el3(CPU_PWR_DOWN_REQ_INTR, cpu_pwrdwn_req_handler);
262 	if (ret != 0) {
263 		WARN("BL31: registering SGI interrupt failed\n");
264 	}
265 
266 	/*
267 	 * Enable IPI IRQ
268 	 * assume the rich OS is OK to handle callback IRQs now.
269 	 * Even if we were wrong, it would not enable the IRQ in
270 	 * the GIC.
271 	 */
272 	pm_ipi_irq_enable(primary_proc);
273 
274 	ret = request_intr_type_el3(PLAT_VERSAL_IPI_IRQ, ipi_fiq_handler);
275 	if (ret != 0) {
276 		WARN("BL31: registering IPI interrupt failed\n");
277 	}
278 
279 	gicd_write_irouter(gicv3_driver_data->gicd_base, PLAT_VERSAL_IPI_IRQ, MODE);
280 
281 	/* Register for idle callback during force power down/restart */
282 	ret = (int32_t)pm_register_notifier(primary_proc->node_id, EVENT_CPU_PWRDWN,
283 				   0x0U, 0x1U, SECURE_FLAG);
284 	if (ret != 0) {
285 		WARN("BL31: registering idle callback for restart/force power down failed\n");
286 	}
287 
288 	return ret;
289 }
290 
291 /**
292  * eemi_for_compatibility() - EEMI calls handler for deprecated calls.
293  * @api_id: identifier for the API being called.
294  * @pm_arg: pointer to the argument data for the API call.
295  * @handle: Pointer to caller's context structure.
296  * @security_flag: SECURE_FLAG or NON_SECURE_FLAG.
297  *
298  * Return: If EEMI API found then, uintptr_t type address, else 0.
299  *
300  * Some EEMI API's use case needs to be changed in Linux driver, so they
301  * can take advantage of common EEMI handler in TF-A. As of now the old
302  * implementation of these APIs are required to maintain backward compatibility
303  * until their use case in linux driver changes.
304  *
305  */
306 static uintptr_t eemi_for_compatibility(uint32_t api_id, uint32_t *pm_arg,
307 					void *handle, uint32_t security_flag)
308 {
309 	enum pm_ret_status ret;
310 
311 	switch (api_id) {
312 
313 	case (uint32_t)PM_FEATURE_CHECK:
314 	{
315 		uint32_t result[RET_PAYLOAD_ARG_CNT] = {0U};
316 
317 		ret = pm_feature_check(pm_arg[0], result, security_flag);
318 		SMC_RET2(handle, (uint64_t)ret | ((uint64_t)result[0] << 32U),
319 			 (uint64_t)result[1] | ((uint64_t)result[2] << 32U));
320 	}
321 
322 	case PM_LOAD_PDI:
323 	{
324 		ret = pm_load_pdi(pm_arg[0], pm_arg[1], pm_arg[2],
325 				  security_flag);
326 		SMC_RET1(handle, (uint64_t)ret);
327 	}
328 
329 	default:
330 		return (uintptr_t)0;
331 	}
332 }
333 
334 /**
335  * eemi_psci_debugfs_handler() - EEMI API invoked from PSCI.
336  * @api_id: identifier for the API being called.
337  * @pm_arg: pointer to the argument data for the API call.
338  * @handle: Pointer to caller's context structure.
339  * @security_flag: SECURE_FLAG or NON_SECURE_FLAG.
340  *
341  * These EEMI APIs performs CPU specific power management tasks.
342  * These EEMI APIs are invoked either from PSCI or from debugfs in kernel.
343  * These calls require CPU specific processing before sending IPI request to
344  * Platform Management Controller. For example enable/disable CPU specific
345  * interrupts. This requires separate handler for these calls and may not be
346  * handled using common eemi handler.
347  *
348  * Return: If EEMI API found then, uintptr_t type address, else 0.
349  *
350  */
351 static uintptr_t eemi_psci_debugfs_handler(uint32_t api_id, uint32_t *pm_arg,
352 					   void *handle, uint32_t security_flag)
353 {
354 	enum pm_ret_status ret;
355 
356 	switch (api_id) {
357 
358 	case (uint32_t)PM_SELF_SUSPEND:
359 		ret = pm_self_suspend(pm_arg[0], pm_arg[1], pm_arg[2],
360 				      pm_arg[3], security_flag);
361 		SMC_RET1(handle, (u_register_t)ret);
362 
363 	case (uint32_t)PM_FORCE_POWERDOWN:
364 		ret = pm_force_powerdown(pm_arg[0], (uint8_t)pm_arg[1], security_flag);
365 		SMC_RET1(handle, (u_register_t)ret);
366 
367 	case (uint32_t)PM_REQ_SUSPEND:
368 		ret = pm_req_suspend(pm_arg[0], (uint8_t)pm_arg[1], pm_arg[2],
369 				     pm_arg[3], security_flag);
370 		SMC_RET1(handle, (u_register_t)ret);
371 
372 	case (uint32_t)PM_ABORT_SUSPEND:
373 		ret = pm_abort_suspend((enum pm_abort_reason)pm_arg[0], security_flag);
374 		SMC_RET1(handle, (u_register_t)ret);
375 
376 	case (uint32_t)PM_SYSTEM_SHUTDOWN:
377 		ret = pm_system_shutdown(pm_arg[0], pm_arg[1], security_flag);
378 		SMC_RET1(handle, (u_register_t)ret);
379 
380 	default:
381 		return (uintptr_t)0;
382 	}
383 }
384 
385 /**
386  * TF_A_specific_handler() - SMC handler for TF-A specific functionality.
387  * @api_id: identifier for the API being called.
388  * @pm_arg: pointer to the argument data for the API call.
389  * @handle: Pointer to caller's context structure.
390  * @security_flag: SECURE_FLAG or NON_SECURE_FLAG.
391  *
392  * These EEMI calls performs functionality that does not require
393  * IPI transaction. The handler ends in TF-A and returns requested data to
394  * kernel from TF-A.
395  *
396  * Return: If TF-A specific API found then, uintptr_t type address, else 0
397  *
398  */
399 static uintptr_t TF_A_specific_handler(uint32_t api_id, uint32_t *pm_arg,
400 				       void *handle, uint32_t security_flag)
401 {
402 	switch (api_id) {
403 
404 	case TF_A_FEATURE_CHECK:
405 	{
406 		enum pm_ret_status ret;
407 		uint32_t result[PAYLOAD_ARG_CNT] = {0U};
408 
409 		ret = eemi_feature_check(pm_arg[0], result);
410 		SMC_RET1(handle, (uint64_t)ret | ((uint64_t)result[0] << 32U));
411 	}
412 
413 	case TF_A_PM_REGISTER_SGI:
414 	{
415 		int32_t ret;
416 
417 		ret = pm_register_sgi(pm_arg[0], pm_arg[1]);
418 		if (ret != 0) {
419 			SMC_RET1(handle, (uint32_t)PM_RET_ERROR_ARGS);
420 		}
421 
422 		SMC_RET1(handle, (uint32_t)PM_RET_SUCCESS);
423 	}
424 
425 	case PM_GET_CALLBACK_DATA:
426 	{
427 		uint32_t result[4] = {0};
428 		enum pm_ret_status ret;
429 
430 		ret = pm_get_callbackdata(result, ARRAY_SIZE(result), security_flag, 1U);
431 		if (ret != PM_RET_SUCCESS) {
432 			result[0] = (uint32_t)ret;
433 		}
434 
435 		SMC_RET2(handle,
436 			(uint64_t)result[0] | ((uint64_t)result[1] << 32U),
437 			(uint64_t)result[2] | ((uint64_t)result[3] << 32U));
438 	}
439 
440 	case PM_GET_TRUSTZONE_VERSION:
441 		SMC_RET1(handle, (uint64_t)PM_RET_SUCCESS |
442 			 ((uint64_t)TZ_VERSION << 32U));
443 
444 	default:
445 		return (uintptr_t)0;
446 	}
447 }
448 
449 /**
450  * eemi_handler() - Prepare EEMI payload and perform IPI transaction.
451  * @api_id: identifier for the API being called.
452  * @pm_arg: pointer to the argument data for the API call.
453  * @handle: Pointer to caller's context structure.
454  * @security_flag: SECURE_FLAG or NON_SECURE_FLAG.
455  *
456  * EEMI - Embedded Energy Management Interface is Xilinx proprietary protocol
457  * to allow communication between power management controller and different
458  * processing clusters.
459  *
460  * This handler prepares EEMI protocol payload received from kernel and performs
461  * IPI transaction.
462  *
463  * Return: If EEMI API found then, uintptr_t type address, else 0
464  *
465  */
466 static uintptr_t eemi_handler(uint32_t api_id, uint32_t *pm_arg,
467 			      void *handle, uint32_t security_flag)
468 {
469 	enum pm_ret_status ret;
470 	uint32_t buf[RET_PAYLOAD_ARG_CNT] = {0};
471 
472 	ret = pm_handle_eemi_call(security_flag, api_id, pm_arg[0], pm_arg[1],
473 				  pm_arg[2], pm_arg[3], pm_arg[4], buf);
474 	/*
475 	 * Two IOCTLs, to get clock name and pinctrl name of pm_query_data API
476 	 * receives 5 words of respoonse from firmware. Currently linux driver can
477 	 * receive only 4 words from TF-A. So, this needs to be handled separately
478 	 * than other eemi calls.
479 	 */
480 	if (api_id == (uint32_t)PM_QUERY_DATA) {
481 		if (((pm_arg[0] == (uint32_t)XPM_QID_CLOCK_GET_NAME) ||
482 		    (pm_arg[0] == (uint32_t)XPM_QID_PINCTRL_GET_FUNCTION_NAME)) &&
483 		    (ret == PM_RET_SUCCESS)) {
484 			SMC_RET2(handle, (uint64_t)buf[0] | ((uint64_t)buf[1] << 32U),
485 				(uint64_t)buf[2] | ((uint64_t)buf[3] << 32U));
486 		}
487 	}
488 
489 	SMC_RET2(handle, (uint64_t)ret | ((uint64_t)buf[0] << 32U),
490 		 (uint64_t)buf[1] | ((uint64_t)buf[2] << 32U));
491 }
492 
493 /**
494  * eemi_api_handler() - Prepare EEMI payload and perform IPI transaction.
495  * @api_id: identifier for the API being called.
496  * @pm_arg: pointer to the argument data for the API call.
497  * @handle: Pointer to caller's context structure.
498  * @security_flag: SECURE_FLAG or NON_SECURE_FLAG.
499  *
500  * EEMI - Embedded Energy Management Interface is AMD-Xilinx proprietary
501  * protocol to allow communication between power management controller and
502  * different processing clusters.
503  *
504  * This handler prepares EEMI protocol payload received from kernel and performs
505  * IPI transaction.
506  *
507  * Return: If EEMI API found then, uintptr_t type address, else 0
508  */
509 static uintptr_t eemi_api_handler(uint32_t api_id, const uint32_t *pm_arg,
510 				  void *handle, uint32_t security_flag)
511 {
512 	enum pm_ret_status ret;
513 	uint32_t buf[RET_PAYLOAD_ARG_CNT] = {0U};
514 	uint32_t payload[PAYLOAD_ARG_CNT] = {0U};
515 	uint32_t module_id;
516 
517 	module_id = (api_id & MODULE_ID_MASK) >> 8U;
518 
519 	PM_PACK_PAYLOAD7(payload, module_id, security_flag, api_id,
520 			 pm_arg[0], pm_arg[1], pm_arg[2], pm_arg[3],
521 			 pm_arg[4], pm_arg[5]);
522 
523 	ret = pm_ipi_send_sync(primary_proc, payload, (uint32_t *)buf,
524 			       RET_PAYLOAD_ARG_CNT);
525 
526 	SMC_RET4(handle, (uint64_t)ret | ((uint64_t)buf[0] << 32U),
527 		 (uint64_t)buf[1] | ((uint64_t)buf[2] << 32U),
528 		 (uint64_t)buf[3] | ((uint64_t)buf[4] << 32U),
529 		 (uint64_t)buf[5]);
530 }
531 
532 /**
533  * pm_smc_handler() - SMC handler for PM-API calls coming from EL1/EL2.
534  * @smc_fid: Function Identifier.
535  * @x1: SMC64 Arguments from kernel.
536  * @x2: SMC64 Arguments from kernel.
537  * @x3: SMC64 Arguments from kernel (upper 32-bits).
538  * @x4: Unused.
539  * @cookie: Unused.
540  * @handle: Pointer to caller's context structure.
541  * @flags: SECURE_FLAG or NON_SECURE_FLAG.
542  *
543  * Return: Unused.
544  *
545  * Determines that smc_fid is valid and supported PM SMC Function ID from the
546  * list of pm_api_ids, otherwise completes the request with
547  * the unknown SMC Function ID.
548  *
549  * The SMC calls for PM service are forwarded from SIP Service SMC handler
550  * function with rt_svc_handle signature.
551  *
552  */
553 uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3,
554 			uint64_t x4, const void *cookie, void *handle, uint64_t flags)
555 {
556 	(void)cookie;
557 	uintptr_t ret;
558 	uint32_t pm_arg[PAYLOAD_ARG_CNT] = {0};
559 	uint32_t security_flag = NON_SECURE_FLAG;
560 	uint32_t api_id;
561 	bool status = false, status_tmp = false;
562 	const uint64_t x[4] = {x1, x2, x3, x4};
563 
564 	/* Handle case where PM wasn't initialized properly */
565 	if (pm_up == false) {
566 		SMC_RET1(handle, SMC_UNK);
567 	}
568 
569 	/*
570 	 * Mark BIT24 payload (i.e 1st bit of pm_arg[3] ) as secure (0)
571 	 * if smc called is secure
572 	 *
573 	 * Add redundant macro call to immune the code from glitches
574 	 */
575 	SECURE_REDUNDANT_CALL(status, status_tmp, is_caller_secure, flags);
576 	if ((status != false) && (status_tmp != false)) {
577 		security_flag = SECURE_FLAG;
578 	}
579 
580 	if ((smc_fid & FUNCID_NUM_MASK) == PASS_THROUGH_FW_CMD_ID) {
581 		api_id = lower_32_bits(x[0]);
582 
583 		EXTRACT_ARGS(pm_arg, x);
584 
585 		return eemi_api_handler(api_id, pm_arg, handle, security_flag);
586 	}
587 
588 	pm_arg[0] = (uint32_t)x1;
589 	pm_arg[1] = (uint32_t)(x1 >> 32U);
590 	pm_arg[2] = (uint32_t)x2;
591 	pm_arg[3] = (uint32_t)(x2 >> 32U);
592 	pm_arg[4] = (uint32_t)x3;
593 	(void)(x4);
594 	api_id = smc_fid & FUNCID_NUM_MASK;
595 
596 	ret = eemi_for_compatibility(api_id, pm_arg, handle, security_flag);
597 	if (ret != (uintptr_t)0) {
598 		return ret;
599 	}
600 
601 	ret = eemi_psci_debugfs_handler(api_id, pm_arg, handle,
602 					(uint32_t)flags);
603 	if (ret !=  (uintptr_t)0) {
604 		return ret;
605 	}
606 
607 	ret = TF_A_specific_handler(api_id, pm_arg, handle, security_flag);
608 	if (ret !=  (uintptr_t)0) {
609 		return ret;
610 	}
611 
612 	ret = eemi_handler(api_id, pm_arg, handle, security_flag);
613 
614 	return ret;
615 }
616