1 /* 2 * Copyright (c) 2014-2020, Arm Limited and Contributors. All rights reserved. 3 * Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #include <assert.h> 9 #include <inttypes.h> 10 #include <stdint.h> 11 12 #include <arch_helpers.h> 13 #include <common/debug.h> 14 #include <plat_startup.h> 15 16 17 /* 18 * HandoffParams 19 * Parameter bitfield encoding 20 * ----------------------------------------------------------------------------- 21 * Exec State 0 0 -> Aarch64, 1-> Aarch32 22 * endianness 1 0 -> LE, 1 -> BE 23 * secure (TZ) 2 0 -> Non secure, 1 -> secure 24 * EL 3:4 00 -> EL0, 01 -> EL1, 10 -> EL2, 11 -> EL3 25 * CPU# 5:6 00 -> A53_0, 01 -> A53_1, 10 -> A53_2, 11 -> A53_3 26 */ 27 28 #define XBL_FLAGS_ESTATE_SHIFT 0U 29 #define XBL_FLAGS_ESTATE_MASK (1U << XBL_FLAGS_ESTATE_SHIFT) 30 #define XBL_FLAGS_ESTATE_A64 0U 31 #define XBL_FLAGS_ESTATE_A32 1U 32 33 #define XBL_FLAGS_ENDIAN_SHIFT 1U 34 #define XBL_FLAGS_ENDIAN_MASK (1U << XBL_FLAGS_ENDIAN_SHIFT) 35 #define XBL_FLAGS_ENDIAN_LE 0U 36 #define XBL_FLAGS_ENDIAN_BE 1U 37 38 #define XBL_FLAGS_TZ_SHIFT 2U 39 #define XBL_FLAGS_TZ_MASK (1U << XBL_FLAGS_TZ_SHIFT) 40 #define XBL_FLAGS_NON_SECURE 0U 41 #define XBL_FLAGS_SECURE 1U 42 43 #define XBL_FLAGS_EL_SHIFT 3U 44 #define XBL_FLAGS_EL_MASK (3U << XBL_FLAGS_EL_SHIFT) 45 #define XBL_FLAGS_EL0 0U 46 #define XBL_FLAGS_EL1 1U 47 #define XBL_FLAGS_EL2 2U 48 #define XBL_FLAGS_EL3 3U 49 50 #define XBL_FLAGS_CPU_SHIFT 5U 51 #define XBL_FLAGS_CPU_MASK (3U << XBL_FLAGS_CPU_SHIFT) 52 #define XBL_FLAGS_A53_0 0U 53 #define XBL_FLAGS_A53_1 1U 54 #define XBL_FLAGS_A53_2 2U 55 #define XBL_FLAGS_A53_3 3U 56 57 /** 58 * get_xbl_cpu() - Get the target CPU for partition. 59 * @partition: Pointer to partition struct. 60 * 61 * Return: XBL_FLAGS_A53_0, XBL_FLAGS_A53_1, XBL_FLAGS_A53_2 or XBL_FLAGS_A53_3. 62 * 63 */ 64 static int32_t get_xbl_cpu(const struct xbl_partition *partition) 65 { 66 uint64_t flags = partition->flags & XBL_FLAGS_CPU_MASK; 67 68 return flags >> XBL_FLAGS_CPU_SHIFT; 69 } 70 71 /** 72 * get_xbl_el() - Get the target exception level for partition. 73 * @partition: Pointer to partition struct. 74 * 75 * Return: XBL_FLAGS_EL0, XBL_FLAGS_EL1, XBL_FLAGS_EL2 or XBL_FLAGS_EL3. 76 * 77 */ 78 static int32_t get_xbl_el(const struct xbl_partition *partition) 79 { 80 uint64_t flags = partition->flags & XBL_FLAGS_EL_MASK; 81 82 return flags >> XBL_FLAGS_EL_SHIFT; 83 } 84 85 /** 86 * get_xbl_ss() - Get the target security state for partition. 87 * @partition: Pointer to partition struct. 88 * 89 * Return: XBL_FLAGS_NON_SECURE or XBL_FLAGS_SECURE. 90 * 91 */ 92 static int32_t get_xbl_ss(const struct xbl_partition *partition) 93 { 94 uint64_t flags = partition->flags & XBL_FLAGS_TZ_MASK; 95 96 return flags >> XBL_FLAGS_TZ_SHIFT; 97 } 98 99 /** 100 * get_xbl_endian() - Get the target endianness for partition. 101 * @partition: Pointer to partition struct. 102 * 103 * Return: SPSR_E_LITTLE or SPSR_E_BIG. 104 * 105 */ 106 static int32_t get_xbl_endian(const struct xbl_partition *partition) 107 { 108 uint64_t flags = partition->flags & XBL_FLAGS_ENDIAN_MASK; 109 110 flags >>= XBL_FLAGS_ENDIAN_SHIFT; 111 112 if (flags == XBL_FLAGS_ENDIAN_BE) { 113 return SPSR_E_BIG; 114 } else { 115 return SPSR_E_LITTLE; 116 } 117 } 118 119 /** 120 * get_xbl_estate() - Get the target execution state for partition. 121 * @partition: Pointer to partition struct. 122 * 123 * Return: XBL_FLAGS_ESTATE_A32 or XBL_FLAGS_ESTATE_A64. 124 * 125 */ 126 static int32_t get_xbl_estate(const struct xbl_partition *partition) 127 { 128 uint64_t flags = partition->flags & XBL_FLAGS_ESTATE_MASK; 129 130 return flags >> XBL_FLAGS_ESTATE_SHIFT; 131 } 132 133 /** 134 * xbl_tfa_handover() - Populates the bl32 and bl33 image info structures. 135 * @bl32: BL32 image info structure. 136 * @bl33: BL33 image info structure. 137 * @tfa_handoff_addr: TF-A handoff address. 138 * 139 * Process the handoff parameters from the XBL and populate the BL32 and BL33 140 * image info structures accordingly. 141 * 142 * Return: Return the status of the handoff. The value will be from the 143 * xbl_handoff enum. 144 * 145 */ 146 enum xbl_handoff xbl_handover(entry_point_info_t *bl32, 147 entry_point_info_t *bl33, 148 uint64_t handoff_addr) 149 { 150 const struct xbl_handoff_params *HandoffParams; 151 152 if (!handoff_addr) { 153 WARN("BL31: No handoff structure passed\n"); 154 return XBL_HANDOFF_NO_STRUCT; 155 } 156 157 HandoffParams = (struct xbl_handoff_params *)handoff_addr; 158 if ((HandoffParams->magic[0] != 'X') || 159 (HandoffParams->magic[1] != 'L') || 160 (HandoffParams->magic[2] != 'N') || 161 (HandoffParams->magic[3] != 'X')) { 162 ERROR("BL31: invalid handoff structure at %" PRIx64 "\n", handoff_addr); 163 return XBL_HANDOFF_INVAL_STRUCT; 164 } 165 166 VERBOSE("BL31: TF-A handoff params at:0x%" PRIx64 ", entries:%u\n", 167 handoff_addr, HandoffParams->num_entries); 168 if (HandoffParams->num_entries > XBL_MAX_PARTITIONS) { 169 ERROR("BL31: TF-A handoff params: too many partitions (%u/%u)\n", 170 HandoffParams->num_entries, XBL_MAX_PARTITIONS); 171 return XBL_HANDOFF_TOO_MANY_PARTS; 172 } 173 174 /* 175 * we loop over all passed entries but only populate two image structs 176 * (bl32, bl33). I.e. the last applicable images in the handoff 177 * structure will be used for the hand off 178 */ 179 for (size_t i = 0; i < HandoffParams->num_entries; i++) { 180 entry_point_info_t *image; 181 int32_t target_estate, target_secure, target_cpu; 182 uint32_t target_endianness, target_el; 183 184 VERBOSE("BL31: %zd: entry:0x%" PRIx64 ", flags:0x%" PRIx64 "\n", i, 185 HandoffParams->partition[i].entry_point, 186 HandoffParams->partition[i].flags); 187 188 target_cpu = get_xbl_cpu(&HandoffParams->partition[i]); 189 if (target_cpu != XBL_FLAGS_A53_0) { 190 WARN("BL31: invalid target CPU (%i)\n", target_cpu); 191 continue; 192 } 193 194 target_el = get_xbl_el(&HandoffParams->partition[i]); 195 if ((target_el == XBL_FLAGS_EL3) || 196 (target_el == XBL_FLAGS_EL0)) { 197 WARN("BL31: invalid exception level (%i)\n", target_el); 198 continue; 199 } 200 201 target_secure = get_xbl_ss(&HandoffParams->partition[i]); 202 if (target_secure == XBL_FLAGS_SECURE && 203 target_el == XBL_FLAGS_EL2) { 204 WARN("BL31: invalid security state (%i) for exception level (%i)\n", 205 target_secure, target_el); 206 continue; 207 } 208 209 target_estate = get_xbl_estate(&HandoffParams->partition[i]); 210 target_endianness = get_xbl_endian(&HandoffParams->partition[i]); 211 212 if (target_secure == XBL_FLAGS_SECURE) { 213 image = bl32; 214 215 if (target_estate == XBL_FLAGS_ESTATE_A32) { 216 bl32->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, 217 target_endianness, 218 DISABLE_ALL_EXCEPTIONS); 219 } else { 220 bl32->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, 221 DISABLE_ALL_EXCEPTIONS); 222 } 223 } else { 224 image = bl33; 225 226 if (target_estate == XBL_FLAGS_ESTATE_A32) { 227 if (target_el == XBL_FLAGS_EL2) { 228 target_el = MODE32_hyp; 229 } else { 230 target_el = MODE32_sys; 231 } 232 233 bl33->spsr = SPSR_MODE32(target_el, SPSR_T_ARM, 234 target_endianness, 235 DISABLE_ALL_EXCEPTIONS); 236 } else { 237 if (target_el == XBL_FLAGS_EL2) { 238 target_el = MODE_EL2; 239 } else { 240 target_el = MODE_EL1; 241 } 242 243 bl33->spsr = SPSR_64(target_el, MODE_SP_ELX, 244 DISABLE_ALL_EXCEPTIONS); 245 } 246 } 247 248 VERBOSE("Setting up %s entry point to:%" PRIx64 ", el:%x\n", 249 target_secure == XBL_FLAGS_SECURE ? "BL32" : "BL33", 250 HandoffParams->partition[i].entry_point, 251 target_el); 252 image->pc = HandoffParams->partition[i].entry_point; 253 254 if (target_endianness == SPSR_E_BIG) { 255 EP_SET_EE(image->h.attr, EP_EE_BIG); 256 } else { 257 EP_SET_EE(image->h.attr, EP_EE_LITTLE); 258 } 259 } 260 261 return XBL_HANDOFF_SUCCESS; 262 } 263