1 /* 2 * Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 9 #include <arch_helpers.h> 10 #include <common/debug.h> 11 #include <plat_startup.h> 12 13 14 /* 15 * ATFHandoffParams 16 * Parameter bitfield encoding 17 * ----------------------------------------------------------------------------- 18 * Exec State 0 0 -> Aarch64, 1-> Aarch32 19 * endianness 1 0 -> LE, 1 -> BE 20 * secure (TZ) 2 0 -> Non secure, 1 -> secure 21 * EL 3:4 00 -> EL0, 01 -> EL1, 10 -> EL2, 11 -> EL3 22 * CPU# 5:6 00 -> A53_0, 01 -> A53_1, 10 -> A53_2, 11 -> A53_3 23 */ 24 25 #define FSBL_FLAGS_ESTATE_SHIFT 0 26 #define FSBL_FLAGS_ESTATE_MASK (1 << FSBL_FLAGS_ESTATE_SHIFT) 27 #define FSBL_FLAGS_ESTATE_A64 0 28 #define FSBL_FLAGS_ESTATE_A32 1 29 30 #define FSBL_FLAGS_ENDIAN_SHIFT 1 31 #define FSBL_FLAGS_ENDIAN_MASK (1 << FSBL_FLAGS_ENDIAN_SHIFT) 32 #define FSBL_FLAGS_ENDIAN_LE 0 33 #define FSBL_FLAGS_ENDIAN_BE 1 34 35 #define FSBL_FLAGS_TZ_SHIFT 2 36 #define FSBL_FLAGS_TZ_MASK (1 << FSBL_FLAGS_TZ_SHIFT) 37 #define FSBL_FLAGS_NON_SECURE 0 38 #define FSBL_FLAGS_SECURE 1 39 40 #define FSBL_FLAGS_EL_SHIFT 3 41 #define FSBL_FLAGS_EL_MASK (3 << FSBL_FLAGS_EL_SHIFT) 42 #define FSBL_FLAGS_EL0 0 43 #define FSBL_FLAGS_EL1 1 44 #define FSBL_FLAGS_EL2 2 45 #define FSBL_FLAGS_EL3 3 46 47 #define FSBL_FLAGS_CPU_SHIFT 5 48 #define FSBL_FLAGS_CPU_MASK (3 << FSBL_FLAGS_CPU_SHIFT) 49 #define FSBL_FLAGS_A53_0 0 50 #define FSBL_FLAGS_A53_1 1 51 #define FSBL_FLAGS_A53_2 2 52 #define FSBL_FLAGS_A53_3 3 53 54 #define FSBL_MAX_PARTITIONS 8 55 56 /* Structure corresponding to each partition entry */ 57 struct xfsbl_partition { 58 uint64_t entry_point; 59 uint64_t flags; 60 }; 61 62 /* Structure for handoff parameters to ARM Trusted Firmware (ATF) */ 63 struct xfsbl_atf_handoff_params { 64 uint8_t magic[4]; 65 uint32_t num_entries; 66 struct xfsbl_partition partition[FSBL_MAX_PARTITIONS]; 67 }; 68 69 /** 70 * @partition: Pointer to partition struct 71 * 72 * Get the target CPU for @partition. 73 * 74 * Return: FSBL_FLAGS_A53_0, FSBL_FLAGS_A53_1, FSBL_FLAGS_A53_2 or FSBL_FLAGS_A53_3 75 */ 76 static int get_fsbl_cpu(const struct xfsbl_partition *partition) 77 { 78 uint64_t flags = partition->flags & FSBL_FLAGS_CPU_MASK; 79 80 return flags >> FSBL_FLAGS_CPU_SHIFT; 81 } 82 83 /** 84 * @partition: Pointer to partition struct 85 * 86 * Get the target exception level for @partition. 87 * 88 * Return: FSBL_FLAGS_EL0, FSBL_FLAGS_EL1, FSBL_FLAGS_EL2 or FSBL_FLAGS_EL3 89 */ 90 static int get_fsbl_el(const struct xfsbl_partition *partition) 91 { 92 uint64_t flags = partition->flags & FSBL_FLAGS_EL_MASK; 93 94 return flags >> FSBL_FLAGS_EL_SHIFT; 95 } 96 97 /** 98 * @partition: Pointer to partition struct 99 * 100 * Get the target security state for @partition. 101 * 102 * Return: FSBL_FLAGS_NON_SECURE or FSBL_FLAGS_SECURE 103 */ 104 static int get_fsbl_ss(const struct xfsbl_partition *partition) 105 { 106 uint64_t flags = partition->flags & FSBL_FLAGS_TZ_MASK; 107 108 return flags >> FSBL_FLAGS_TZ_SHIFT; 109 } 110 111 /** 112 * @partition: Pointer to partition struct 113 * 114 * Get the target endianness for @partition. 115 * 116 * Return: SPSR_E_LITTLE or SPSR_E_BIG 117 */ 118 static int get_fsbl_endian(const struct xfsbl_partition *partition) 119 { 120 uint64_t flags = partition->flags & FSBL_FLAGS_ENDIAN_MASK; 121 122 flags >>= FSBL_FLAGS_ENDIAN_SHIFT; 123 124 if (flags == FSBL_FLAGS_ENDIAN_BE) 125 return SPSR_E_BIG; 126 else 127 return SPSR_E_LITTLE; 128 } 129 130 /** 131 * @partition: Pointer to partition struct 132 * 133 * Get the target execution state for @partition. 134 * 135 * Return: FSBL_FLAGS_ESTATE_A32 or FSBL_FLAGS_ESTATE_A64 136 */ 137 static int get_fsbl_estate(const struct xfsbl_partition *partition) 138 { 139 uint64_t flags = partition->flags & FSBL_FLAGS_ESTATE_MASK; 140 141 return flags >> FSBL_FLAGS_ESTATE_SHIFT; 142 } 143 144 /** 145 * Populates the bl32 and bl33 image info structures 146 * @bl32: BL32 image info structure 147 * @bl33: BL33 image info structure 148 * atf_handoff_addr: ATF handoff address 149 * 150 * Process the handoff paramters from the FSBL and populate the BL32 and BL33 151 * image info structures accordingly. 152 * 153 * Return: Return the status of the handoff. The value will be from the 154 * fsbl_handoff enum. 155 */ 156 enum fsbl_handoff fsbl_atf_handover(entry_point_info_t *bl32, 157 entry_point_info_t *bl33, 158 uint64_t atf_handoff_addr) 159 { 160 const struct xfsbl_atf_handoff_params *ATFHandoffParams; 161 assert((atf_handoff_addr < BL31_BASE) || 162 (atf_handoff_addr > (uint64_t)&__BL31_END__)); 163 if (!atf_handoff_addr) { 164 WARN("BL31: No ATF handoff structure passed\n"); 165 return FSBL_HANDOFF_NO_STRUCT; 166 } 167 168 ATFHandoffParams = (struct xfsbl_atf_handoff_params *)atf_handoff_addr; 169 if ((ATFHandoffParams->magic[0] != 'X') || 170 (ATFHandoffParams->magic[1] != 'L') || 171 (ATFHandoffParams->magic[2] != 'N') || 172 (ATFHandoffParams->magic[3] != 'X')) { 173 ERROR("BL31: invalid ATF handoff structure at %llx\n", 174 atf_handoff_addr); 175 return FSBL_HANDOFF_INVAL_STRUCT; 176 } 177 178 VERBOSE("BL31: ATF handoff params at:0x%llx, entries:%u\n", 179 atf_handoff_addr, ATFHandoffParams->num_entries); 180 if (ATFHandoffParams->num_entries > FSBL_MAX_PARTITIONS) { 181 ERROR("BL31: ATF handoff params: too many partitions (%u/%u)\n", 182 ATFHandoffParams->num_entries, FSBL_MAX_PARTITIONS); 183 return FSBL_HANDOFF_TOO_MANY_PARTS; 184 } 185 186 /* 187 * we loop over all passed entries but only populate two image structs 188 * (bl32, bl33). I.e. the last applicable images in the handoff 189 * structure will be used for the hand off 190 */ 191 for (size_t i = 0; i < ATFHandoffParams->num_entries; i++) { 192 entry_point_info_t *image; 193 int target_estate, target_secure; 194 int target_cpu, target_endianness, target_el; 195 196 VERBOSE("BL31: %zd: entry:0x%llx, flags:0x%llx\n", i, 197 ATFHandoffParams->partition[i].entry_point, 198 ATFHandoffParams->partition[i].flags); 199 200 target_cpu = get_fsbl_cpu(&ATFHandoffParams->partition[i]); 201 if (target_cpu != FSBL_FLAGS_A53_0) { 202 WARN("BL31: invalid target CPU (%i)\n", target_cpu); 203 continue; 204 } 205 206 target_el = get_fsbl_el(&ATFHandoffParams->partition[i]); 207 if ((target_el == FSBL_FLAGS_EL3) || 208 (target_el == FSBL_FLAGS_EL0)) { 209 WARN("BL31: invalid exception level (%i)\n", target_el); 210 continue; 211 } 212 213 target_secure = get_fsbl_ss(&ATFHandoffParams->partition[i]); 214 if (target_secure == FSBL_FLAGS_SECURE && 215 target_el == FSBL_FLAGS_EL2) { 216 WARN("BL31: invalid security state (%i) for exception level (%i)\n", 217 target_secure, target_el); 218 continue; 219 } 220 221 target_estate = get_fsbl_estate(&ATFHandoffParams->partition[i]); 222 target_endianness = get_fsbl_endian(&ATFHandoffParams->partition[i]); 223 224 if (target_secure == FSBL_FLAGS_SECURE) { 225 image = bl32; 226 227 if (target_estate == FSBL_FLAGS_ESTATE_A32) 228 bl32->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, 229 target_endianness, 230 DISABLE_ALL_EXCEPTIONS); 231 else 232 bl32->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, 233 DISABLE_ALL_EXCEPTIONS); 234 } else { 235 image = bl33; 236 237 if (target_estate == FSBL_FLAGS_ESTATE_A32) { 238 if (target_el == FSBL_FLAGS_EL2) 239 target_el = MODE32_hyp; 240 else 241 target_el = MODE32_sys; 242 243 bl33->spsr = SPSR_MODE32(target_el, SPSR_T_ARM, 244 target_endianness, 245 DISABLE_ALL_EXCEPTIONS); 246 } else { 247 if (target_el == FSBL_FLAGS_EL2) 248 target_el = MODE_EL2; 249 else 250 target_el = MODE_EL1; 251 252 bl33->spsr = SPSR_64(target_el, MODE_SP_ELX, 253 DISABLE_ALL_EXCEPTIONS); 254 } 255 } 256 257 VERBOSE("Setting up %s entry point to:%llx, el:%x\n", 258 target_secure == FSBL_FLAGS_SECURE ? "BL32" : "BL33", 259 ATFHandoffParams->partition[i].entry_point, 260 target_el); 261 image->pc = ATFHandoffParams->partition[i].entry_point; 262 263 if (target_endianness == SPSR_E_BIG) 264 EP_SET_EE(image->h.attr, EP_EE_BIG); 265 else 266 EP_SET_EE(image->h.attr, EP_EE_LITTLE); 267 } 268 269 return FSBL_HANDOFF_SUCCESS; 270 } 271