xref: /rk3399_ARM-atf/plat/xilinx/common/plat_startup.c (revision 4d9f825a5616e15975abc0e8ffef4fd8afe09634)
1*4d9f825aSVenkatesh Yadav Abbarapu /*
2*4d9f825aSVenkatesh Yadav Abbarapu  * Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved.
3*4d9f825aSVenkatesh Yadav Abbarapu  *
4*4d9f825aSVenkatesh Yadav Abbarapu  * SPDX-License-Identifier: BSD-3-Clause
5*4d9f825aSVenkatesh Yadav Abbarapu  */
6*4d9f825aSVenkatesh Yadav Abbarapu 
7*4d9f825aSVenkatesh Yadav Abbarapu #include <assert.h>
8*4d9f825aSVenkatesh Yadav Abbarapu 
9*4d9f825aSVenkatesh Yadav Abbarapu #include <arch_helpers.h>
10*4d9f825aSVenkatesh Yadav Abbarapu #include <common/debug.h>
11*4d9f825aSVenkatesh Yadav Abbarapu #include <plat_startup.h>
12*4d9f825aSVenkatesh Yadav Abbarapu 
13*4d9f825aSVenkatesh Yadav Abbarapu 
14*4d9f825aSVenkatesh Yadav Abbarapu /*
15*4d9f825aSVenkatesh Yadav Abbarapu  * ATFHandoffParams
16*4d9f825aSVenkatesh Yadav Abbarapu  * Parameter		bitfield	encoding
17*4d9f825aSVenkatesh Yadav Abbarapu  * -----------------------------------------------------------------------------
18*4d9f825aSVenkatesh Yadav Abbarapu  * Exec State		0		0 -> Aarch64, 1-> Aarch32
19*4d9f825aSVenkatesh Yadav Abbarapu  * endianness		1		0 -> LE, 1 -> BE
20*4d9f825aSVenkatesh Yadav Abbarapu  * secure (TZ)		2		0 -> Non secure, 1 -> secure
21*4d9f825aSVenkatesh Yadav Abbarapu  * EL			3:4		00 -> EL0, 01 -> EL1, 10 -> EL2, 11 -> EL3
22*4d9f825aSVenkatesh Yadav Abbarapu  * CPU#			5:6		00 -> A53_0, 01 -> A53_1, 10 -> A53_2, 11 -> A53_3
23*4d9f825aSVenkatesh Yadav Abbarapu  */
24*4d9f825aSVenkatesh Yadav Abbarapu 
25*4d9f825aSVenkatesh Yadav Abbarapu #define FSBL_FLAGS_ESTATE_SHIFT		0
26*4d9f825aSVenkatesh Yadav Abbarapu #define FSBL_FLAGS_ESTATE_MASK		(1 << FSBL_FLAGS_ESTATE_SHIFT)
27*4d9f825aSVenkatesh Yadav Abbarapu #define FSBL_FLAGS_ESTATE_A64		0
28*4d9f825aSVenkatesh Yadav Abbarapu #define FSBL_FLAGS_ESTATE_A32		1
29*4d9f825aSVenkatesh Yadav Abbarapu 
30*4d9f825aSVenkatesh Yadav Abbarapu #define FSBL_FLAGS_ENDIAN_SHIFT		1
31*4d9f825aSVenkatesh Yadav Abbarapu #define FSBL_FLAGS_ENDIAN_MASK		(1 << FSBL_FLAGS_ENDIAN_SHIFT)
32*4d9f825aSVenkatesh Yadav Abbarapu #define FSBL_FLAGS_ENDIAN_LE		0
33*4d9f825aSVenkatesh Yadav Abbarapu #define FSBL_FLAGS_ENDIAN_BE		1
34*4d9f825aSVenkatesh Yadav Abbarapu 
35*4d9f825aSVenkatesh Yadav Abbarapu #define FSBL_FLAGS_TZ_SHIFT		2
36*4d9f825aSVenkatesh Yadav Abbarapu #define FSBL_FLAGS_TZ_MASK		(1 << FSBL_FLAGS_TZ_SHIFT)
37*4d9f825aSVenkatesh Yadav Abbarapu #define FSBL_FLAGS_NON_SECURE		0
38*4d9f825aSVenkatesh Yadav Abbarapu #define FSBL_FLAGS_SECURE		1
39*4d9f825aSVenkatesh Yadav Abbarapu 
40*4d9f825aSVenkatesh Yadav Abbarapu #define FSBL_FLAGS_EL_SHIFT		3
41*4d9f825aSVenkatesh Yadav Abbarapu #define FSBL_FLAGS_EL_MASK		(3 << FSBL_FLAGS_EL_SHIFT)
42*4d9f825aSVenkatesh Yadav Abbarapu #define FSBL_FLAGS_EL0			0
43*4d9f825aSVenkatesh Yadav Abbarapu #define FSBL_FLAGS_EL1			1
44*4d9f825aSVenkatesh Yadav Abbarapu #define FSBL_FLAGS_EL2			2
45*4d9f825aSVenkatesh Yadav Abbarapu #define FSBL_FLAGS_EL3			3
46*4d9f825aSVenkatesh Yadav Abbarapu 
47*4d9f825aSVenkatesh Yadav Abbarapu #define FSBL_FLAGS_CPU_SHIFT		5
48*4d9f825aSVenkatesh Yadav Abbarapu #define FSBL_FLAGS_CPU_MASK		(3 << FSBL_FLAGS_CPU_SHIFT)
49*4d9f825aSVenkatesh Yadav Abbarapu #define FSBL_FLAGS_A53_0		0
50*4d9f825aSVenkatesh Yadav Abbarapu #define FSBL_FLAGS_A53_1		1
51*4d9f825aSVenkatesh Yadav Abbarapu #define FSBL_FLAGS_A53_2		2
52*4d9f825aSVenkatesh Yadav Abbarapu #define FSBL_FLAGS_A53_3		3
53*4d9f825aSVenkatesh Yadav Abbarapu 
54*4d9f825aSVenkatesh Yadav Abbarapu #define FSBL_MAX_PARTITIONS		8
55*4d9f825aSVenkatesh Yadav Abbarapu 
56*4d9f825aSVenkatesh Yadav Abbarapu /* Structure corresponding to each partition entry */
57*4d9f825aSVenkatesh Yadav Abbarapu struct xfsbl_partition {
58*4d9f825aSVenkatesh Yadav Abbarapu 	uint64_t entry_point;
59*4d9f825aSVenkatesh Yadav Abbarapu 	uint64_t flags;
60*4d9f825aSVenkatesh Yadav Abbarapu };
61*4d9f825aSVenkatesh Yadav Abbarapu 
62*4d9f825aSVenkatesh Yadav Abbarapu /* Structure for handoff parameters to ARM Trusted Firmware (ATF) */
63*4d9f825aSVenkatesh Yadav Abbarapu struct xfsbl_atf_handoff_params {
64*4d9f825aSVenkatesh Yadav Abbarapu 	uint8_t magic[4];
65*4d9f825aSVenkatesh Yadav Abbarapu 	uint32_t num_entries;
66*4d9f825aSVenkatesh Yadav Abbarapu 	struct xfsbl_partition partition[FSBL_MAX_PARTITIONS];
67*4d9f825aSVenkatesh Yadav Abbarapu };
68*4d9f825aSVenkatesh Yadav Abbarapu 
69*4d9f825aSVenkatesh Yadav Abbarapu /**
70*4d9f825aSVenkatesh Yadav Abbarapu  * @partition: Pointer to partition struct
71*4d9f825aSVenkatesh Yadav Abbarapu  *
72*4d9f825aSVenkatesh Yadav Abbarapu  * Get the target CPU for @partition.
73*4d9f825aSVenkatesh Yadav Abbarapu  *
74*4d9f825aSVenkatesh Yadav Abbarapu  * Return: FSBL_FLAGS_A53_0, FSBL_FLAGS_A53_1, FSBL_FLAGS_A53_2 or FSBL_FLAGS_A53_3
75*4d9f825aSVenkatesh Yadav Abbarapu  */
76*4d9f825aSVenkatesh Yadav Abbarapu static int get_fsbl_cpu(const struct xfsbl_partition *partition)
77*4d9f825aSVenkatesh Yadav Abbarapu {
78*4d9f825aSVenkatesh Yadav Abbarapu 	uint64_t flags = partition->flags & FSBL_FLAGS_CPU_MASK;
79*4d9f825aSVenkatesh Yadav Abbarapu 
80*4d9f825aSVenkatesh Yadav Abbarapu 	return flags >> FSBL_FLAGS_CPU_SHIFT;
81*4d9f825aSVenkatesh Yadav Abbarapu }
82*4d9f825aSVenkatesh Yadav Abbarapu 
83*4d9f825aSVenkatesh Yadav Abbarapu /**
84*4d9f825aSVenkatesh Yadav Abbarapu  * @partition: Pointer to partition struct
85*4d9f825aSVenkatesh Yadav Abbarapu  *
86*4d9f825aSVenkatesh Yadav Abbarapu  * Get the target exception level for @partition.
87*4d9f825aSVenkatesh Yadav Abbarapu  *
88*4d9f825aSVenkatesh Yadav Abbarapu  * Return: FSBL_FLAGS_EL0, FSBL_FLAGS_EL1, FSBL_FLAGS_EL2 or FSBL_FLAGS_EL3
89*4d9f825aSVenkatesh Yadav Abbarapu  */
90*4d9f825aSVenkatesh Yadav Abbarapu static int get_fsbl_el(const struct xfsbl_partition *partition)
91*4d9f825aSVenkatesh Yadav Abbarapu {
92*4d9f825aSVenkatesh Yadav Abbarapu 	uint64_t flags = partition->flags & FSBL_FLAGS_EL_MASK;
93*4d9f825aSVenkatesh Yadav Abbarapu 
94*4d9f825aSVenkatesh Yadav Abbarapu 	return flags >> FSBL_FLAGS_EL_SHIFT;
95*4d9f825aSVenkatesh Yadav Abbarapu }
96*4d9f825aSVenkatesh Yadav Abbarapu 
97*4d9f825aSVenkatesh Yadav Abbarapu /**
98*4d9f825aSVenkatesh Yadav Abbarapu  * @partition: Pointer to partition struct
99*4d9f825aSVenkatesh Yadav Abbarapu  *
100*4d9f825aSVenkatesh Yadav Abbarapu  * Get the target security state for @partition.
101*4d9f825aSVenkatesh Yadav Abbarapu  *
102*4d9f825aSVenkatesh Yadav Abbarapu  * Return: FSBL_FLAGS_NON_SECURE or FSBL_FLAGS_SECURE
103*4d9f825aSVenkatesh Yadav Abbarapu  */
104*4d9f825aSVenkatesh Yadav Abbarapu static int get_fsbl_ss(const struct xfsbl_partition *partition)
105*4d9f825aSVenkatesh Yadav Abbarapu {
106*4d9f825aSVenkatesh Yadav Abbarapu 	uint64_t flags = partition->flags & FSBL_FLAGS_TZ_MASK;
107*4d9f825aSVenkatesh Yadav Abbarapu 
108*4d9f825aSVenkatesh Yadav Abbarapu 	return flags >> FSBL_FLAGS_TZ_SHIFT;
109*4d9f825aSVenkatesh Yadav Abbarapu }
110*4d9f825aSVenkatesh Yadav Abbarapu 
111*4d9f825aSVenkatesh Yadav Abbarapu /**
112*4d9f825aSVenkatesh Yadav Abbarapu  * @partition: Pointer to partition struct
113*4d9f825aSVenkatesh Yadav Abbarapu  *
114*4d9f825aSVenkatesh Yadav Abbarapu  * Get the target endianness for @partition.
115*4d9f825aSVenkatesh Yadav Abbarapu  *
116*4d9f825aSVenkatesh Yadav Abbarapu  * Return: SPSR_E_LITTLE or SPSR_E_BIG
117*4d9f825aSVenkatesh Yadav Abbarapu  */
118*4d9f825aSVenkatesh Yadav Abbarapu static int get_fsbl_endian(const struct xfsbl_partition *partition)
119*4d9f825aSVenkatesh Yadav Abbarapu {
120*4d9f825aSVenkatesh Yadav Abbarapu 	uint64_t flags = partition->flags & FSBL_FLAGS_ENDIAN_MASK;
121*4d9f825aSVenkatesh Yadav Abbarapu 
122*4d9f825aSVenkatesh Yadav Abbarapu 	flags >>= FSBL_FLAGS_ENDIAN_SHIFT;
123*4d9f825aSVenkatesh Yadav Abbarapu 
124*4d9f825aSVenkatesh Yadav Abbarapu 	if (flags == FSBL_FLAGS_ENDIAN_BE)
125*4d9f825aSVenkatesh Yadav Abbarapu 		return SPSR_E_BIG;
126*4d9f825aSVenkatesh Yadav Abbarapu 	else
127*4d9f825aSVenkatesh Yadav Abbarapu 		return SPSR_E_LITTLE;
128*4d9f825aSVenkatesh Yadav Abbarapu }
129*4d9f825aSVenkatesh Yadav Abbarapu 
130*4d9f825aSVenkatesh Yadav Abbarapu /**
131*4d9f825aSVenkatesh Yadav Abbarapu  * @partition: Pointer to partition struct
132*4d9f825aSVenkatesh Yadav Abbarapu  *
133*4d9f825aSVenkatesh Yadav Abbarapu  * Get the target execution state for @partition.
134*4d9f825aSVenkatesh Yadav Abbarapu  *
135*4d9f825aSVenkatesh Yadav Abbarapu  * Return: FSBL_FLAGS_ESTATE_A32 or FSBL_FLAGS_ESTATE_A64
136*4d9f825aSVenkatesh Yadav Abbarapu  */
137*4d9f825aSVenkatesh Yadav Abbarapu static int get_fsbl_estate(const struct xfsbl_partition *partition)
138*4d9f825aSVenkatesh Yadav Abbarapu {
139*4d9f825aSVenkatesh Yadav Abbarapu 	uint64_t flags = partition->flags & FSBL_FLAGS_ESTATE_MASK;
140*4d9f825aSVenkatesh Yadav Abbarapu 
141*4d9f825aSVenkatesh Yadav Abbarapu 	return flags >> FSBL_FLAGS_ESTATE_SHIFT;
142*4d9f825aSVenkatesh Yadav Abbarapu }
143*4d9f825aSVenkatesh Yadav Abbarapu 
144*4d9f825aSVenkatesh Yadav Abbarapu /**
145*4d9f825aSVenkatesh Yadav Abbarapu  * Populates the bl32 and bl33 image info structures
146*4d9f825aSVenkatesh Yadav Abbarapu  * @bl32:	BL32 image info structure
147*4d9f825aSVenkatesh Yadav Abbarapu  * @bl33:	BL33 image info structure
148*4d9f825aSVenkatesh Yadav Abbarapu  * atf_handoff_addr:  ATF handoff address
149*4d9f825aSVenkatesh Yadav Abbarapu  *
150*4d9f825aSVenkatesh Yadav Abbarapu  * Process the handoff paramters from the FSBL and populate the BL32 and BL33
151*4d9f825aSVenkatesh Yadav Abbarapu  * image info structures accordingly.
152*4d9f825aSVenkatesh Yadav Abbarapu  *
153*4d9f825aSVenkatesh Yadav Abbarapu  * Return: Return the status of the handoff. The value will be from the
154*4d9f825aSVenkatesh Yadav Abbarapu  *         fsbl_handoff enum.
155*4d9f825aSVenkatesh Yadav Abbarapu  */
156*4d9f825aSVenkatesh Yadav Abbarapu enum fsbl_handoff fsbl_atf_handover(entry_point_info_t *bl32,
157*4d9f825aSVenkatesh Yadav Abbarapu 					entry_point_info_t *bl33,
158*4d9f825aSVenkatesh Yadav Abbarapu 					uint64_t atf_handoff_addr)
159*4d9f825aSVenkatesh Yadav Abbarapu {
160*4d9f825aSVenkatesh Yadav Abbarapu 	const struct xfsbl_atf_handoff_params *ATFHandoffParams;
161*4d9f825aSVenkatesh Yadav Abbarapu 	assert((atf_handoff_addr < BL31_BASE) ||
162*4d9f825aSVenkatesh Yadav Abbarapu 	       (atf_handoff_addr > (uint64_t)&__BL31_END__));
163*4d9f825aSVenkatesh Yadav Abbarapu 	if (!atf_handoff_addr) {
164*4d9f825aSVenkatesh Yadav Abbarapu 		WARN("BL31: No ATF handoff structure passed\n");
165*4d9f825aSVenkatesh Yadav Abbarapu 		return FSBL_HANDOFF_NO_STRUCT;
166*4d9f825aSVenkatesh Yadav Abbarapu 	}
167*4d9f825aSVenkatesh Yadav Abbarapu 
168*4d9f825aSVenkatesh Yadav Abbarapu 	ATFHandoffParams = (struct xfsbl_atf_handoff_params *)atf_handoff_addr;
169*4d9f825aSVenkatesh Yadav Abbarapu 	if ((ATFHandoffParams->magic[0] != 'X') ||
170*4d9f825aSVenkatesh Yadav Abbarapu 	    (ATFHandoffParams->magic[1] != 'L') ||
171*4d9f825aSVenkatesh Yadav Abbarapu 	    (ATFHandoffParams->magic[2] != 'N') ||
172*4d9f825aSVenkatesh Yadav Abbarapu 	    (ATFHandoffParams->magic[3] != 'X')) {
173*4d9f825aSVenkatesh Yadav Abbarapu 		ERROR("BL31: invalid ATF handoff structure at %llx\n",
174*4d9f825aSVenkatesh Yadav Abbarapu 		      atf_handoff_addr);
175*4d9f825aSVenkatesh Yadav Abbarapu 		return FSBL_HANDOFF_INVAL_STRUCT;
176*4d9f825aSVenkatesh Yadav Abbarapu 	}
177*4d9f825aSVenkatesh Yadav Abbarapu 
178*4d9f825aSVenkatesh Yadav Abbarapu 	VERBOSE("BL31: ATF handoff params at:0x%llx, entries:%u\n",
179*4d9f825aSVenkatesh Yadav Abbarapu 		atf_handoff_addr, ATFHandoffParams->num_entries);
180*4d9f825aSVenkatesh Yadav Abbarapu 	if (ATFHandoffParams->num_entries > FSBL_MAX_PARTITIONS) {
181*4d9f825aSVenkatesh Yadav Abbarapu 		ERROR("BL31: ATF handoff params: too many partitions (%u/%u)\n",
182*4d9f825aSVenkatesh Yadav Abbarapu 		      ATFHandoffParams->num_entries, FSBL_MAX_PARTITIONS);
183*4d9f825aSVenkatesh Yadav Abbarapu 		return FSBL_HANDOFF_TOO_MANY_PARTS;
184*4d9f825aSVenkatesh Yadav Abbarapu 	}
185*4d9f825aSVenkatesh Yadav Abbarapu 
186*4d9f825aSVenkatesh Yadav Abbarapu 	/*
187*4d9f825aSVenkatesh Yadav Abbarapu 	 * we loop over all passed entries but only populate two image structs
188*4d9f825aSVenkatesh Yadav Abbarapu 	 * (bl32, bl33). I.e. the last applicable images in the handoff
189*4d9f825aSVenkatesh Yadav Abbarapu 	 * structure will be used for the hand off
190*4d9f825aSVenkatesh Yadav Abbarapu 	 */
191*4d9f825aSVenkatesh Yadav Abbarapu 	for (size_t i = 0; i < ATFHandoffParams->num_entries; i++) {
192*4d9f825aSVenkatesh Yadav Abbarapu 		entry_point_info_t *image;
193*4d9f825aSVenkatesh Yadav Abbarapu 		int target_estate, target_secure;
194*4d9f825aSVenkatesh Yadav Abbarapu 		int target_cpu, target_endianness, target_el;
195*4d9f825aSVenkatesh Yadav Abbarapu 
196*4d9f825aSVenkatesh Yadav Abbarapu 		VERBOSE("BL31: %zd: entry:0x%llx, flags:0x%llx\n", i,
197*4d9f825aSVenkatesh Yadav Abbarapu 			ATFHandoffParams->partition[i].entry_point,
198*4d9f825aSVenkatesh Yadav Abbarapu 			ATFHandoffParams->partition[i].flags);
199*4d9f825aSVenkatesh Yadav Abbarapu 
200*4d9f825aSVenkatesh Yadav Abbarapu 		target_cpu = get_fsbl_cpu(&ATFHandoffParams->partition[i]);
201*4d9f825aSVenkatesh Yadav Abbarapu 		if (target_cpu != FSBL_FLAGS_A53_0) {
202*4d9f825aSVenkatesh Yadav Abbarapu 			WARN("BL31: invalid target CPU (%i)\n", target_cpu);
203*4d9f825aSVenkatesh Yadav Abbarapu 			continue;
204*4d9f825aSVenkatesh Yadav Abbarapu 		}
205*4d9f825aSVenkatesh Yadav Abbarapu 
206*4d9f825aSVenkatesh Yadav Abbarapu 		target_el = get_fsbl_el(&ATFHandoffParams->partition[i]);
207*4d9f825aSVenkatesh Yadav Abbarapu 		if ((target_el == FSBL_FLAGS_EL3) ||
208*4d9f825aSVenkatesh Yadav Abbarapu 		    (target_el == FSBL_FLAGS_EL0)) {
209*4d9f825aSVenkatesh Yadav Abbarapu 			WARN("BL31: invalid exception level (%i)\n", target_el);
210*4d9f825aSVenkatesh Yadav Abbarapu 			continue;
211*4d9f825aSVenkatesh Yadav Abbarapu 		}
212*4d9f825aSVenkatesh Yadav Abbarapu 
213*4d9f825aSVenkatesh Yadav Abbarapu 		target_secure = get_fsbl_ss(&ATFHandoffParams->partition[i]);
214*4d9f825aSVenkatesh Yadav Abbarapu 		if (target_secure == FSBL_FLAGS_SECURE &&
215*4d9f825aSVenkatesh Yadav Abbarapu 		    target_el == FSBL_FLAGS_EL2) {
216*4d9f825aSVenkatesh Yadav Abbarapu 			WARN("BL31: invalid security state (%i) for exception level (%i)\n",
217*4d9f825aSVenkatesh Yadav Abbarapu 			     target_secure, target_el);
218*4d9f825aSVenkatesh Yadav Abbarapu 			continue;
219*4d9f825aSVenkatesh Yadav Abbarapu 		}
220*4d9f825aSVenkatesh Yadav Abbarapu 
221*4d9f825aSVenkatesh Yadav Abbarapu 		target_estate = get_fsbl_estate(&ATFHandoffParams->partition[i]);
222*4d9f825aSVenkatesh Yadav Abbarapu 		target_endianness = get_fsbl_endian(&ATFHandoffParams->partition[i]);
223*4d9f825aSVenkatesh Yadav Abbarapu 
224*4d9f825aSVenkatesh Yadav Abbarapu 		if (target_secure == FSBL_FLAGS_SECURE) {
225*4d9f825aSVenkatesh Yadav Abbarapu 			image = bl32;
226*4d9f825aSVenkatesh Yadav Abbarapu 
227*4d9f825aSVenkatesh Yadav Abbarapu 			if (target_estate == FSBL_FLAGS_ESTATE_A32)
228*4d9f825aSVenkatesh Yadav Abbarapu 				bl32->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM,
229*4d9f825aSVenkatesh Yadav Abbarapu 							 target_endianness,
230*4d9f825aSVenkatesh Yadav Abbarapu 							 DISABLE_ALL_EXCEPTIONS);
231*4d9f825aSVenkatesh Yadav Abbarapu 			else
232*4d9f825aSVenkatesh Yadav Abbarapu 				bl32->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
233*4d9f825aSVenkatesh Yadav Abbarapu 						     DISABLE_ALL_EXCEPTIONS);
234*4d9f825aSVenkatesh Yadav Abbarapu 		} else {
235*4d9f825aSVenkatesh Yadav Abbarapu 			image = bl33;
236*4d9f825aSVenkatesh Yadav Abbarapu 
237*4d9f825aSVenkatesh Yadav Abbarapu 			if (target_estate == FSBL_FLAGS_ESTATE_A32) {
238*4d9f825aSVenkatesh Yadav Abbarapu 				if (target_el == FSBL_FLAGS_EL2)
239*4d9f825aSVenkatesh Yadav Abbarapu 					target_el = MODE32_hyp;
240*4d9f825aSVenkatesh Yadav Abbarapu 				else
241*4d9f825aSVenkatesh Yadav Abbarapu 					target_el = MODE32_sys;
242*4d9f825aSVenkatesh Yadav Abbarapu 
243*4d9f825aSVenkatesh Yadav Abbarapu 				bl33->spsr = SPSR_MODE32(target_el, SPSR_T_ARM,
244*4d9f825aSVenkatesh Yadav Abbarapu 							 target_endianness,
245*4d9f825aSVenkatesh Yadav Abbarapu 							 DISABLE_ALL_EXCEPTIONS);
246*4d9f825aSVenkatesh Yadav Abbarapu 			} else {
247*4d9f825aSVenkatesh Yadav Abbarapu 				if (target_el == FSBL_FLAGS_EL2)
248*4d9f825aSVenkatesh Yadav Abbarapu 					target_el = MODE_EL2;
249*4d9f825aSVenkatesh Yadav Abbarapu 				else
250*4d9f825aSVenkatesh Yadav Abbarapu 					target_el = MODE_EL1;
251*4d9f825aSVenkatesh Yadav Abbarapu 
252*4d9f825aSVenkatesh Yadav Abbarapu 				bl33->spsr = SPSR_64(target_el, MODE_SP_ELX,
253*4d9f825aSVenkatesh Yadav Abbarapu 						     DISABLE_ALL_EXCEPTIONS);
254*4d9f825aSVenkatesh Yadav Abbarapu 			}
255*4d9f825aSVenkatesh Yadav Abbarapu 		}
256*4d9f825aSVenkatesh Yadav Abbarapu 
257*4d9f825aSVenkatesh Yadav Abbarapu 		VERBOSE("Setting up %s entry point to:%llx, el:%x\n",
258*4d9f825aSVenkatesh Yadav Abbarapu 			target_secure == FSBL_FLAGS_SECURE ? "BL32" : "BL33",
259*4d9f825aSVenkatesh Yadav Abbarapu 			ATFHandoffParams->partition[i].entry_point,
260*4d9f825aSVenkatesh Yadav Abbarapu 			target_el);
261*4d9f825aSVenkatesh Yadav Abbarapu 		image->pc = ATFHandoffParams->partition[i].entry_point;
262*4d9f825aSVenkatesh Yadav Abbarapu 
263*4d9f825aSVenkatesh Yadav Abbarapu 		if (target_endianness == SPSR_E_BIG)
264*4d9f825aSVenkatesh Yadav Abbarapu 			EP_SET_EE(image->h.attr, EP_EE_BIG);
265*4d9f825aSVenkatesh Yadav Abbarapu 		else
266*4d9f825aSVenkatesh Yadav Abbarapu 			EP_SET_EE(image->h.attr, EP_EE_LITTLE);
267*4d9f825aSVenkatesh Yadav Abbarapu 	}
268*4d9f825aSVenkatesh Yadav Abbarapu 
269*4d9f825aSVenkatesh Yadav Abbarapu 	return FSBL_HANDOFF_SUCCESS;
270*4d9f825aSVenkatesh Yadav Abbarapu }
271