xref: /rk3399_ARM-atf/plat/xilinx/common/include/plat_fdt.h (revision 59eaed03723208bb4cf1ead13012dff733261922)
156d1857eSAmit Nagal /*
2ea453871SMaheedhar Bollapalli  * Copyright (c) 2023-2025, Advanced Micro Devices, Inc. All rights reserved.
356d1857eSAmit Nagal  *
456d1857eSAmit Nagal  * SPDX-License-Identifier: BSD-3-Clause
556d1857eSAmit Nagal  *
656d1857eSAmit Nagal  */
756d1857eSAmit Nagal #ifndef PLAT_FDT_H
856d1857eSAmit Nagal #define PLAT_FDT_H
956d1857eSAmit Nagal 
1056d1857eSAmit Nagal void prepare_dtb(void);
11ea453871SMaheedhar Bollapalli uintptr_t plat_retrieve_dt_addr(void);
12046e1304SPrasad Kummari int32_t is_valid_dtb(void *fdt);
13046e1304SPrasad Kummari 
14*59eaed03SMaheedhar Bollapalli #define MAX_RESERVE_ADDR_INDICES 32
15*59eaed03SMaheedhar Bollapalli struct reserve_mem_range {
16*59eaed03SMaheedhar Bollapalli 	uintptr_t base;
17*59eaed03SMaheedhar Bollapalli 	size_t size;
18*59eaed03SMaheedhar Bollapalli };
19*59eaed03SMaheedhar Bollapalli 
20*59eaed03SMaheedhar Bollapalli #if (TRANSFER_LIST == 1)
21*59eaed03SMaheedhar Bollapalli uint32_t retrieve_reserved_entries(void);
22*59eaed03SMaheedhar Bollapalli struct reserve_mem_range *get_reserved_entries_fdt(uint32_t *reserve_nodes);
23*59eaed03SMaheedhar Bollapalli #else
24*59eaed03SMaheedhar Bollapalli static inline uint32_t retrieve_reserved_entries(void)
25*59eaed03SMaheedhar Bollapalli {
26*59eaed03SMaheedhar Bollapalli 	return 0;
27*59eaed03SMaheedhar Bollapalli }
28*59eaed03SMaheedhar Bollapalli 
29*59eaed03SMaheedhar Bollapalli static inline struct reserve_mem_range *get_reserved_entries_fdt(uint32_t *reserve_nodes)
30*59eaed03SMaheedhar Bollapalli {
31*59eaed03SMaheedhar Bollapalli 	if (reserve_nodes) {
32*59eaed03SMaheedhar Bollapalli 		*reserve_nodes = 0;
33*59eaed03SMaheedhar Bollapalli 	}
34*59eaed03SMaheedhar Bollapalli 
35*59eaed03SMaheedhar Bollapalli 	return NULL;
36*59eaed03SMaheedhar Bollapalli }
37*59eaed03SMaheedhar Bollapalli #endif
38*59eaed03SMaheedhar Bollapalli 
3956d1857eSAmit Nagal #endif /* PLAT_FDT_H */
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