14265bcaeSAkshay Belsare /* 24265bcaeSAkshay Belsare * Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved. 34265bcaeSAkshay Belsare * 44265bcaeSAkshay Belsare * SPDX-License-Identifier: BSD-3-Clause 54265bcaeSAkshay Belsare */ 64265bcaeSAkshay Belsare 74265bcaeSAkshay Belsare /* Header file to contain common macros across different platforms */ 84265bcaeSAkshay Belsare #ifndef PLAT_COMMON_H 94265bcaeSAkshay Belsare #define PLAT_COMMON_H 104265bcaeSAkshay Belsare 114265bcaeSAkshay Belsare #define __bf_shf(x) (__builtin_ffsll(x) - 1U) 124265bcaeSAkshay Belsare #define FIELD_GET(_mask, _reg) \ 134265bcaeSAkshay Belsare ({ \ 144265bcaeSAkshay Belsare (typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)); \ 154265bcaeSAkshay Belsare }) 164265bcaeSAkshay Belsare 17*ade92a64SJay Buddhabhatti /******************************************************************************* 18*ade92a64SJay Buddhabhatti * interrupt handling related constants 19*ade92a64SJay Buddhabhatti ******************************************************************************/ 20*ade92a64SJay Buddhabhatti #define ARM_IRQ_SEC_SGI_0 8U 21*ade92a64SJay Buddhabhatti #define ARM_IRQ_SEC_SGI_1 9U 22*ade92a64SJay Buddhabhatti #define ARM_IRQ_SEC_SGI_2 10U 23*ade92a64SJay Buddhabhatti #define ARM_IRQ_SEC_SGI_3 11U 24*ade92a64SJay Buddhabhatti #define ARM_IRQ_SEC_SGI_4 12U 25*ade92a64SJay Buddhabhatti #define ARM_IRQ_SEC_SGI_5 13U 26*ade92a64SJay Buddhabhatti #define ARM_IRQ_SEC_SGI_6 14U 27*ade92a64SJay Buddhabhatti #define ARM_IRQ_SEC_SGI_7 15U 28*ade92a64SJay Buddhabhatti 294265bcaeSAkshay Belsare #endif /* PLAT_COMMON_H */ 30