xref: /rk3399_ARM-atf/plat/ti/k3low/common/am62l_topology.c (revision 7147732a78852034972b93b87f17838f6aa0f9e5)
1*21b14fd2SDhruva Gole /*
2*21b14fd2SDhruva Gole  * Copyright (c) 2025, Texas Instruments Incorporated - https://www.ti.com/
3*21b14fd2SDhruva Gole  *
4*21b14fd2SDhruva Gole  * SPDX-License-Identifier: BSD-3-Clause
5*21b14fd2SDhruva Gole  */
6*21b14fd2SDhruva Gole 
7*21b14fd2SDhruva Gole #include <lib/psci/psci.h>
8*21b14fd2SDhruva Gole 
9*21b14fd2SDhruva Gole #include <platform_def.h>
10*21b14fd2SDhruva Gole 
11*21b14fd2SDhruva Gole /* The power domain tree descriptor */
12*21b14fd2SDhruva Gole static unsigned char power_domain_tree_desc[] = {
13*21b14fd2SDhruva Gole 	PLATFORM_SYSTEM_COUNT,
14*21b14fd2SDhruva Gole 	PLATFORM_CLUSTER_COUNT,
15*21b14fd2SDhruva Gole 	K3_CLUSTER0_CORE_COUNT,
16*21b14fd2SDhruva Gole };
17*21b14fd2SDhruva Gole 
plat_get_power_domain_tree_desc(void)18*21b14fd2SDhruva Gole const unsigned char *plat_get_power_domain_tree_desc(void)
19*21b14fd2SDhruva Gole {
20*21b14fd2SDhruva Gole 	return power_domain_tree_desc;
21*21b14fd2SDhruva Gole }
22*21b14fd2SDhruva Gole 
plat_core_pos_by_mpidr(u_register_t mpidr)23*21b14fd2SDhruva Gole int plat_core_pos_by_mpidr(u_register_t mpidr)
24*21b14fd2SDhruva Gole {
25*21b14fd2SDhruva Gole 	unsigned int core = MPIDR_AFFLVL0_VAL(mpidr);
26*21b14fd2SDhruva Gole 
27*21b14fd2SDhruva Gole 	if (MPIDR_AFFLVL3_VAL(mpidr) > 0 ||
28*21b14fd2SDhruva Gole 	    MPIDR_AFFLVL2_VAL(mpidr) > 0) {
29*21b14fd2SDhruva Gole 		return -1;
30*21b14fd2SDhruva Gole 	}
31*21b14fd2SDhruva Gole 
32*21b14fd2SDhruva Gole 	return core;
33*21b14fd2SDhruva Gole }
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