1*878bd5ceSBenjamin Fair /* 2*878bd5ceSBenjamin Fair * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3*878bd5ceSBenjamin Fair * 4*878bd5ceSBenjamin Fair * SPDX-License-Identifier: BSD-3-Clause 5*878bd5ceSBenjamin Fair */ 6*878bd5ceSBenjamin Fair 7*878bd5ceSBenjamin Fair #include <platform_def.h> 8*878bd5ceSBenjamin Fair #include <psci.h> 9*878bd5ceSBenjamin Fair 10*878bd5ceSBenjamin Fair /* The power domain tree descriptor */ 11*878bd5ceSBenjamin Fair static unsigned char power_domain_tree_desc[] = { 12*878bd5ceSBenjamin Fair PLATFORM_CLUSTER_COUNT, 13*878bd5ceSBenjamin Fair K3_CLUSTER0_CORE_COUNT, 14*878bd5ceSBenjamin Fair #if K3_CLUSTER1_MSMC_PORT != UNUSED 15*878bd5ceSBenjamin Fair K3_CLUSTER1_CORE_COUNT, 16*878bd5ceSBenjamin Fair #endif /* K3_CLUSTER1_MSMC_PORT != UNUSED */ 17*878bd5ceSBenjamin Fair #if K3_CLUSTER2_MSMC_PORT != UNUSED 18*878bd5ceSBenjamin Fair K3_CLUSTER2_CORE_COUNT, 19*878bd5ceSBenjamin Fair #endif /* K3_CLUSTER2_MSMC_PORT != UNUSED */ 20*878bd5ceSBenjamin Fair #if K3_CLUSTER3_MSMC_PORT != UNUSED 21*878bd5ceSBenjamin Fair K3_CLUSTER3_CORE_COUNT, 22*878bd5ceSBenjamin Fair #endif /* K3_CLUSTER3_MSMC_PORT != UNUSED */ 23*878bd5ceSBenjamin Fair }; 24*878bd5ceSBenjamin Fair 25*878bd5ceSBenjamin Fair const unsigned char *plat_get_power_domain_tree_desc(void) 26*878bd5ceSBenjamin Fair { 27*878bd5ceSBenjamin Fair return power_domain_tree_desc; 28*878bd5ceSBenjamin Fair } 29*878bd5ceSBenjamin Fair 30*878bd5ceSBenjamin Fair int plat_core_pos_by_mpidr(u_register_t mpidr) 31*878bd5ceSBenjamin Fair { 32*878bd5ceSBenjamin Fair unsigned int cpu_id; 33*878bd5ceSBenjamin Fair 34*878bd5ceSBenjamin Fair mpidr &= MPIDR_AFFINITY_MASK; 35*878bd5ceSBenjamin Fair 36*878bd5ceSBenjamin Fair if (mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)) 37*878bd5ceSBenjamin Fair return -1; 38*878bd5ceSBenjamin Fair 39*878bd5ceSBenjamin Fair cpu_id = MPIDR_AFFLVL0_VAL(mpidr); 40*878bd5ceSBenjamin Fair 41*878bd5ceSBenjamin Fair switch (MPIDR_AFFLVL1_VAL(mpidr)) { 42*878bd5ceSBenjamin Fair case K3_CLUSTER0_MSMC_PORT: 43*878bd5ceSBenjamin Fair if (cpu_id < K3_CLUSTER0_CORE_COUNT) 44*878bd5ceSBenjamin Fair return cpu_id; 45*878bd5ceSBenjamin Fair return -1; 46*878bd5ceSBenjamin Fair #if K3_CLUSTER1_MSMC_PORT != UNUSED 47*878bd5ceSBenjamin Fair case K3_CLUSTER1_MSMC_PORT: 48*878bd5ceSBenjamin Fair if (cpu_id < K3_CLUSTER1_CORE_COUNT) 49*878bd5ceSBenjamin Fair return K3_CLUSTER0_CORE_COUNT + cpu_id; 50*878bd5ceSBenjamin Fair return -1; 51*878bd5ceSBenjamin Fair #endif /* K3_CLUSTER1_MSMC_PORT != UNUSED */ 52*878bd5ceSBenjamin Fair #if K3_CLUSTER2_MSMC_PORT != UNUSED 53*878bd5ceSBenjamin Fair case K3_CLUSTER2_MSMC_PORT: 54*878bd5ceSBenjamin Fair if (cpu_id < K3_CLUSTER2_CORE_COUNT) 55*878bd5ceSBenjamin Fair return K3_CLUSTER0_CORE_COUNT + 56*878bd5ceSBenjamin Fair K3_CLUSTER1_CORE_COUNT + cpu_id; 57*878bd5ceSBenjamin Fair return -1; 58*878bd5ceSBenjamin Fair #endif /* K3_CLUSTER2_MSMC_PORT != UNUSED */ 59*878bd5ceSBenjamin Fair #if K3_CLUSTER3_MSMC_PORT != UNUSED 60*878bd5ceSBenjamin Fair case K3_CLUSTER3_MSMC_PORT: 61*878bd5ceSBenjamin Fair if (cpu_id < K3_CLUSTER3_CORE_COUNT) 62*878bd5ceSBenjamin Fair return K3_CLUSTER0_CORE_COUNT + 63*878bd5ceSBenjamin Fair K3_CLUSTER1_CORE_COUNT + 64*878bd5ceSBenjamin Fair K3_CLUSTER2_CORE_COUNT + cpu_id; 65*878bd5ceSBenjamin Fair return -1; 66*878bd5ceSBenjamin Fair #endif /* K3_CLUSTER3_MSMC_PORT != UNUSED */ 67*878bd5ceSBenjamin Fair default: 68*878bd5ceSBenjamin Fair return -1; 69*878bd5ceSBenjamin Fair } 70*878bd5ceSBenjamin Fair } 71