1878bd5ceSBenjamin Fair /* 2878bd5ceSBenjamin Fair * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3878bd5ceSBenjamin Fair * 4878bd5ceSBenjamin Fair * SPDX-License-Identifier: BSD-3-Clause 5878bd5ceSBenjamin Fair */ 6878bd5ceSBenjamin Fair 7878bd5ceSBenjamin Fair #include <platform_def.h> 8*09d40e0eSAntonio Nino Diaz 9*09d40e0eSAntonio Nino Diaz #include <lib/psci/psci.h> 10878bd5ceSBenjamin Fair 11878bd5ceSBenjamin Fair /* The power domain tree descriptor */ 12878bd5ceSBenjamin Fair static unsigned char power_domain_tree_desc[] = { 1379a1a849SAndrew F. Davis PLATFORM_SYSTEM_COUNT, 14878bd5ceSBenjamin Fair PLATFORM_CLUSTER_COUNT, 15878bd5ceSBenjamin Fair K3_CLUSTER0_CORE_COUNT, 16878bd5ceSBenjamin Fair #if K3_CLUSTER1_MSMC_PORT != UNUSED 17878bd5ceSBenjamin Fair K3_CLUSTER1_CORE_COUNT, 18878bd5ceSBenjamin Fair #endif /* K3_CLUSTER1_MSMC_PORT != UNUSED */ 19878bd5ceSBenjamin Fair #if K3_CLUSTER2_MSMC_PORT != UNUSED 20878bd5ceSBenjamin Fair K3_CLUSTER2_CORE_COUNT, 21878bd5ceSBenjamin Fair #endif /* K3_CLUSTER2_MSMC_PORT != UNUSED */ 22878bd5ceSBenjamin Fair #if K3_CLUSTER3_MSMC_PORT != UNUSED 23878bd5ceSBenjamin Fair K3_CLUSTER3_CORE_COUNT, 24878bd5ceSBenjamin Fair #endif /* K3_CLUSTER3_MSMC_PORT != UNUSED */ 25878bd5ceSBenjamin Fair }; 26878bd5ceSBenjamin Fair 27878bd5ceSBenjamin Fair const unsigned char *plat_get_power_domain_tree_desc(void) 28878bd5ceSBenjamin Fair { 29878bd5ceSBenjamin Fair return power_domain_tree_desc; 30878bd5ceSBenjamin Fair } 31878bd5ceSBenjamin Fair 32878bd5ceSBenjamin Fair int plat_core_pos_by_mpidr(u_register_t mpidr) 33878bd5ceSBenjamin Fair { 34878bd5ceSBenjamin Fair unsigned int cpu_id; 35878bd5ceSBenjamin Fair 36878bd5ceSBenjamin Fair mpidr &= MPIDR_AFFINITY_MASK; 37878bd5ceSBenjamin Fair 38878bd5ceSBenjamin Fair if (mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)) 39878bd5ceSBenjamin Fair return -1; 40878bd5ceSBenjamin Fair 41878bd5ceSBenjamin Fair cpu_id = MPIDR_AFFLVL0_VAL(mpidr); 42878bd5ceSBenjamin Fair 43878bd5ceSBenjamin Fair switch (MPIDR_AFFLVL1_VAL(mpidr)) { 44878bd5ceSBenjamin Fair case K3_CLUSTER0_MSMC_PORT: 45878bd5ceSBenjamin Fair if (cpu_id < K3_CLUSTER0_CORE_COUNT) 46878bd5ceSBenjamin Fair return cpu_id; 47878bd5ceSBenjamin Fair return -1; 48878bd5ceSBenjamin Fair #if K3_CLUSTER1_MSMC_PORT != UNUSED 49878bd5ceSBenjamin Fair case K3_CLUSTER1_MSMC_PORT: 50878bd5ceSBenjamin Fair if (cpu_id < K3_CLUSTER1_CORE_COUNT) 51878bd5ceSBenjamin Fair return K3_CLUSTER0_CORE_COUNT + cpu_id; 52878bd5ceSBenjamin Fair return -1; 53878bd5ceSBenjamin Fair #endif /* K3_CLUSTER1_MSMC_PORT != UNUSED */ 54878bd5ceSBenjamin Fair #if K3_CLUSTER2_MSMC_PORT != UNUSED 55878bd5ceSBenjamin Fair case K3_CLUSTER2_MSMC_PORT: 56878bd5ceSBenjamin Fair if (cpu_id < K3_CLUSTER2_CORE_COUNT) 57878bd5ceSBenjamin Fair return K3_CLUSTER0_CORE_COUNT + 58878bd5ceSBenjamin Fair K3_CLUSTER1_CORE_COUNT + cpu_id; 59878bd5ceSBenjamin Fair return -1; 60878bd5ceSBenjamin Fair #endif /* K3_CLUSTER2_MSMC_PORT != UNUSED */ 61878bd5ceSBenjamin Fair #if K3_CLUSTER3_MSMC_PORT != UNUSED 62878bd5ceSBenjamin Fair case K3_CLUSTER3_MSMC_PORT: 63878bd5ceSBenjamin Fair if (cpu_id < K3_CLUSTER3_CORE_COUNT) 64878bd5ceSBenjamin Fair return K3_CLUSTER0_CORE_COUNT + 65878bd5ceSBenjamin Fair K3_CLUSTER1_CORE_COUNT + 66878bd5ceSBenjamin Fair K3_CLUSTER2_CORE_COUNT + cpu_id; 67878bd5ceSBenjamin Fair return -1; 68878bd5ceSBenjamin Fair #endif /* K3_CLUSTER3_MSMC_PORT != UNUSED */ 69878bd5ceSBenjamin Fair default: 70878bd5ceSBenjamin Fair return -1; 71878bd5ceSBenjamin Fair } 72878bd5ceSBenjamin Fair } 73