xref: /rk3399_ARM-atf/plat/ti/k3/common/k3_psci.c (revision 40d553cfde38d4f68449c62967cd1ce0d6478750)
1 /*
2  * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <assert.h>
8 #include <stdbool.h>
9 
10 #include <arch_helpers.h>
11 #include <common/debug.h>
12 #include <lib/el3_runtime/cpu_data.h>
13 #include <lib/psci/psci.h>
14 #include <plat/common/platform.h>
15 
16 #include <ti_sci_protocol.h>
17 #include <k3_gicv3.h>
18 #include <ti_sci.h>
19 
20 #ifdef TI_AM65X_WORKAROUND
21 /* Need to flush psci internal locks before shutdown or their values are lost */
22 #include "../../../../lib/psci/psci_private.h"
23 #endif
24 
25 uintptr_t k3_sec_entrypoint;
26 
27 static void k3_cpu_standby(plat_local_state_t cpu_state)
28 {
29 	unsigned int scr;
30 
31 	scr = read_scr_el3();
32 	/* Enable the Non secure interrupt to wake the CPU */
33 	write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT);
34 	isb();
35 	/* dsb is good practice before using wfi to enter low power states */
36 	dsb();
37 	/* Enter standby state */
38 	wfi();
39 	/* Restore SCR */
40 	write_scr_el3(scr);
41 }
42 
43 static int k3_pwr_domain_on(u_register_t mpidr)
44 {
45 	int core_id, proc, device, ret;
46 
47 	core_id = plat_core_pos_by_mpidr(mpidr);
48 	if (core_id < 0) {
49 		ERROR("Could not get target core id: %d\n", core_id);
50 		return PSCI_E_INTERN_FAIL;
51 	}
52 
53 	proc = PLAT_PROC_START_ID + core_id;
54 	device = PLAT_PROC_DEVICE_START_ID + core_id;
55 
56 	ret = ti_sci_proc_request(proc);
57 	if (ret) {
58 		ERROR("Request for processor failed: %d\n", ret);
59 		return PSCI_E_INTERN_FAIL;
60 	}
61 
62 	ret = ti_sci_proc_set_boot_cfg(proc, k3_sec_entrypoint, 0, 0);
63 	if (ret) {
64 		ERROR("Request to set core boot address failed: %d\n", ret);
65 		return PSCI_E_INTERN_FAIL;
66 	}
67 
68 	ret = ti_sci_device_get(device);
69 	if (ret) {
70 		ERROR("Request to start core failed: %d\n", ret);
71 		return PSCI_E_INTERN_FAIL;
72 	}
73 
74 	return PSCI_E_SUCCESS;
75 }
76 
77 void k3_pwr_domain_off(const psci_power_state_t *target_state)
78 {
79 	int core_id, proc, device, ret;
80 
81 	/* Prevent interrupts from spuriously waking up this cpu */
82 	k3_gic_cpuif_disable();
83 
84 	core_id = plat_my_core_pos();
85 	proc = PLAT_PROC_START_ID + core_id;
86 	device = PLAT_PROC_DEVICE_START_ID + core_id;
87 
88 	/* Start by sending wait for WFI command */
89 	ret = ti_sci_proc_wait_boot_status_no_wait(proc,
90 			/*
91 			 * Wait maximum time to give us the best chance to get
92 			 * to WFI before this command timeouts
93 			 */
94 			UINT8_MAX, 100, UINT8_MAX, UINT8_MAX,
95 			/* Wait for WFI */
96 			PROC_BOOT_STATUS_FLAG_ARMV8_WFI, 0, 0, 0);
97 	if (ret) {
98 		ERROR("Sending wait for WFI failed (%d)\n", ret);
99 		return;
100 	}
101 
102 	/* Now queue up the core shutdown request */
103 	ret = ti_sci_device_put_no_wait(device);
104 	if (ret) {
105 		ERROR("Sending core shutdown message failed (%d)\n", ret);
106 		return;
107 	}
108 }
109 
110 void k3_pwr_domain_on_finish(const psci_power_state_t *target_state)
111 {
112 	/* TODO: Indicate to System firmware about completion */
113 
114 	k3_gic_pcpu_init();
115 	k3_gic_cpuif_enable();
116 }
117 
118 #ifdef TI_AM65X_WORKAROUND
119 static void  __dead2 k3_pwr_domain_pwr_down_wfi(const psci_power_state_t
120 						  *target_state)
121 {
122 	flush_cpu_data(psci_svc_cpu_data);
123 	flush_dcache_range((uintptr_t) psci_locks, sizeof(psci_locks));
124 	psci_power_down_wfi();
125 }
126 #endif
127 
128 static void __dead2 k3_system_reset(void)
129 {
130 	/* Send the system reset request to system firmware */
131 	ti_sci_core_reboot();
132 
133 	while (true)
134 		wfi();
135 }
136 
137 static int k3_validate_power_state(unsigned int power_state,
138 				   psci_power_state_t *req_state)
139 {
140 	/* TODO: perform the proper validation */
141 
142 	return PSCI_E_SUCCESS;
143 }
144 
145 static int k3_validate_ns_entrypoint(uintptr_t entrypoint)
146 {
147 	/* TODO: perform the proper validation */
148 
149 	return PSCI_E_SUCCESS;
150 }
151 
152 static const plat_psci_ops_t k3_plat_psci_ops = {
153 	.cpu_standby = k3_cpu_standby,
154 	.pwr_domain_on = k3_pwr_domain_on,
155 	.pwr_domain_off = k3_pwr_domain_off,
156 	.pwr_domain_on_finish = k3_pwr_domain_on_finish,
157 #ifdef TI_AM65X_WORKAROUND
158 	.pwr_domain_pwr_down_wfi = k3_pwr_domain_pwr_down_wfi,
159 #endif
160 	.system_reset = k3_system_reset,
161 	.validate_power_state = k3_validate_power_state,
162 	.validate_ns_entrypoint = k3_validate_ns_entrypoint
163 };
164 
165 int plat_setup_psci_ops(uintptr_t sec_entrypoint,
166 			const plat_psci_ops_t **psci_ops)
167 {
168 	k3_sec_entrypoint = sec_entrypoint;
169 
170 	*psci_ops = &k3_plat_psci_ops;
171 
172 	return 0;
173 }
174