1 /* 2 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <arch_helpers.h> 8 #include <assert.h> 9 #include <debug.h> 10 #include <k3_gicv3.h> 11 #include <psci.h> 12 #include <platform.h> 13 #include <stdbool.h> 14 15 #include <ti_sci.h> 16 17 #define STUB() ERROR("stub %s called\n", __func__) 18 19 uintptr_t k3_sec_entrypoint; 20 21 static void k3_cpu_standby(plat_local_state_t cpu_state) 22 { 23 unsigned int scr; 24 25 scr = read_scr_el3(); 26 /* Enable the Non secure interrupt to wake the CPU */ 27 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); 28 isb(); 29 /* dsb is good practice before using wfi to enter low power states */ 30 dsb(); 31 /* Enter standby state */ 32 wfi(); 33 /* Restore SCR */ 34 write_scr_el3(scr); 35 } 36 37 static int k3_pwr_domain_on(u_register_t mpidr) 38 { 39 int core_id, proc, device, ret; 40 41 core_id = plat_core_pos_by_mpidr(mpidr); 42 if (core_id < 0) { 43 ERROR("Could not get target core id: %d\n", core_id); 44 return PSCI_E_INTERN_FAIL; 45 } 46 47 proc = PLAT_PROC_START_ID + core_id; 48 device = PLAT_PROC_DEVICE_START_ID + core_id; 49 50 ret = ti_sci_proc_request(proc); 51 if (ret) { 52 ERROR("Request for processor failed: %d\n", ret); 53 return PSCI_E_INTERN_FAIL; 54 } 55 56 ret = ti_sci_proc_set_boot_cfg(proc, k3_sec_entrypoint, 0, 0); 57 if (ret) { 58 ERROR("Request to set core boot address failed: %d\n", ret); 59 return PSCI_E_INTERN_FAIL; 60 } 61 62 ret = ti_sci_device_get(device); 63 if (ret) { 64 ERROR("Request to start core failed: %d\n", ret); 65 return PSCI_E_INTERN_FAIL; 66 } 67 68 ret = ti_sci_proc_release(proc); 69 if (ret) { 70 /* this is not fatal */ 71 WARN("Could not release processor control: %d\n", ret); 72 } 73 74 return PSCI_E_SUCCESS; 75 } 76 77 void k3_pwr_domain_off(const psci_power_state_t *target_state) 78 { 79 int core_id, device, ret; 80 81 /* Prevent interrupts from spuriously waking up this cpu */ 82 k3_gic_cpuif_disable(); 83 84 core_id = plat_my_core_pos(); 85 device = PLAT_PROC_DEVICE_START_ID + core_id; 86 87 ret = ti_sci_device_put(device); 88 if (ret) { 89 ERROR("Request to stop core failed: %d\n", ret); 90 return; 91 } 92 } 93 94 void k3_pwr_domain_on_finish(const psci_power_state_t *target_state) 95 { 96 /* TODO: Indicate to System firmware about completion */ 97 98 k3_gic_pcpu_init(); 99 k3_gic_cpuif_enable(); 100 } 101 102 static void __dead2 k3_system_reset(void) 103 { 104 /* Send the system reset request to system firmware */ 105 ti_sci_core_reboot(); 106 107 while (true) 108 wfi(); 109 } 110 111 static int k3_validate_power_state(unsigned int power_state, 112 psci_power_state_t *req_state) 113 { 114 /* TODO: perform the proper validation */ 115 116 return PSCI_E_SUCCESS; 117 } 118 119 static int k3_validate_ns_entrypoint(uintptr_t entrypoint) 120 { 121 /* TODO: perform the proper validation */ 122 123 return PSCI_E_SUCCESS; 124 } 125 126 static const plat_psci_ops_t k3_plat_psci_ops = { 127 .cpu_standby = k3_cpu_standby, 128 .pwr_domain_on = k3_pwr_domain_on, 129 .pwr_domain_off = k3_pwr_domain_off, 130 .pwr_domain_on_finish = k3_pwr_domain_on_finish, 131 .system_reset = k3_system_reset, 132 .validate_power_state = k3_validate_power_state, 133 .validate_ns_entrypoint = k3_validate_ns_entrypoint 134 }; 135 136 int plat_setup_psci_ops(uintptr_t sec_entrypoint, 137 const plat_psci_ops_t **psci_ops) 138 { 139 k3_sec_entrypoint = sec_entrypoint; 140 141 *psci_ops = &k3_plat_psci_ops; 142 143 return 0; 144 } 145