1 /* 2 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <arch.h> 8 #include <arch_helpers.h> 9 #include <assert.h> 10 #include <bl_common.h> 11 #include <debug.h> 12 #include <k3_console.h> 13 #include <plat_arm.h> 14 #include <platform_def.h> 15 #include <string.h> 16 17 /* Table of regions to map using the MMU */ 18 const mmap_region_t plat_arm_mmap[] = { 19 MAP_REGION_FLAT(SHARED_RAM_BASE, SHARED_RAM_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 20 MAP_REGION_FLAT(K3_USART_BASE_ADDRESS, K3_USART_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 21 { /* sentinel */ } 22 }; 23 24 /* 25 * Placeholder variables for maintaining information about the next image(s) 26 */ 27 static entry_point_info_t bl32_image_ep_info; 28 static entry_point_info_t bl33_image_ep_info; 29 30 /******************************************************************************* 31 * Gets SPSR for BL33 entry 32 ******************************************************************************/ 33 static uint32_t k3_get_spsr_for_bl33_entry(void) 34 { 35 unsigned long el_status; 36 unsigned int mode; 37 uint32_t spsr; 38 39 /* Figure out what mode we enter the non-secure world in */ 40 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; 41 el_status &= ID_AA64PFR0_ELX_MASK; 42 43 mode = (el_status) ? MODE_EL2 : MODE_EL1; 44 45 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); 46 return spsr; 47 } 48 49 /******************************************************************************* 50 * Perform any BL3-1 early platform setup, such as console init and deciding on 51 * memory layout. 52 ******************************************************************************/ 53 void bl31_early_platform_setup(bl31_params_t *from_bl2, 54 void *plat_params_from_bl2) 55 { 56 /* There are no parameters from BL2 if BL31 is a reset vector */ 57 assert(from_bl2 == NULL); 58 assert(plat_params_from_bl2 == NULL); 59 60 bl31_console_setup(); 61 62 #ifdef BL32_BASE 63 /* Populate entry point information for BL32 */ 64 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); 65 bl32_image_ep_info.pc = BL32_BASE; 66 bl32_image_ep_info.spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, 67 DISABLE_ALL_EXCEPTIONS); 68 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); 69 #endif 70 71 /* Populate entry point information for BL33 */ 72 SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); 73 bl33_image_ep_info.pc = PRELOADED_BL33_BASE; 74 bl33_image_ep_info.spsr = k3_get_spsr_for_bl33_entry(); 75 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); 76 77 #ifdef K3_HW_CONFIG_BASE 78 /* 79 * According to the file ``Documentation/arm64/booting.txt`` of the 80 * Linux kernel tree, Linux expects the physical address of the device 81 * tree blob (DTB) in x0, while x1-x3 are reserved for future use and 82 * must be 0. 83 */ 84 bl33_image_ep_info.args.arg0 = (u_register_t)K3_HW_CONFIG_BASE; 85 bl33_image_ep_info.args.arg1 = 0U; 86 bl33_image_ep_info.args.arg2 = 0U; 87 bl33_image_ep_info.args.arg3 = 0U; 88 #endif 89 } 90 91 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 92 u_register_t arg2, u_register_t arg3) 93 { 94 bl31_early_platform_setup((void *)arg0, (void *)arg1); 95 } 96 97 void bl31_plat_arch_setup(void) 98 { 99 arm_setup_page_tables(BL31_BASE, 100 BL31_END - BL31_BASE, 101 BL_CODE_BASE, 102 BL_CODE_END, 103 BL_RO_DATA_BASE, 104 BL_RO_DATA_END); 105 enable_mmu_el3(0); 106 } 107 108 void bl31_platform_setup(void) 109 { 110 /* TODO: Initialize the GIC CPU and distributor interfaces */ 111 } 112 113 void platform_mem_init(void) 114 { 115 /* Do nothing for now... */ 116 } 117 118 /* 119 * Empty function to prevent the console from being uninitialized after BL33 is 120 * started and allow us to see messages from BL31. 121 */ 122 void bl31_plat_runtime_setup(void) 123 { 124 } 125 126 /******************************************************************************* 127 * Return a pointer to the 'entry_point_info' structure of the next image 128 * for the security state specified. BL3-3 corresponds to the non-secure 129 * image type while BL3-2 corresponds to the secure image type. A NULL 130 * pointer is returned if the image does not exist. 131 ******************************************************************************/ 132 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) 133 { 134 entry_point_info_t *next_image_info; 135 136 assert(sec_state_is_valid(type)); 137 next_image_info = (type == NON_SECURE) ? &bl33_image_ep_info : 138 &bl32_image_ep_info; 139 /* 140 * None of the images on the ARM development platforms can have 0x0 141 * as the entrypoint 142 */ 143 if (next_image_info->pc) 144 return next_image_info; 145 146 NOTICE("Requested nonexistent image\n"); 147 return NULL; 148 } 149