1 /* 2 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <arch.h> 8 #include <arch_helpers.h> 9 #include <assert.h> 10 #include <bl_common.h> 11 #include <debug.h> 12 #include <plat_arm.h> 13 #include <platform_def.h> 14 #include <string.h> 15 16 /* Table of regions to map using the MMU */ 17 const mmap_region_t plat_arm_mmap[] = { 18 MAP_REGION_FLAT(SHARED_RAM_BASE, SHARED_RAM_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 19 { /* sentinel */ } 20 }; 21 22 /* 23 * Placeholder variables for maintaining information about the next image(s) 24 */ 25 static entry_point_info_t bl32_image_ep_info; 26 static entry_point_info_t bl33_image_ep_info; 27 28 /******************************************************************************* 29 * Gets SPSR for BL33 entry 30 ******************************************************************************/ 31 static uint32_t k3_get_spsr_for_bl33_entry(void) 32 { 33 unsigned long el_status; 34 unsigned int mode; 35 uint32_t spsr; 36 37 /* Figure out what mode we enter the non-secure world in */ 38 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; 39 el_status &= ID_AA64PFR0_ELX_MASK; 40 41 mode = (el_status) ? MODE_EL2 : MODE_EL1; 42 43 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); 44 return spsr; 45 } 46 47 /******************************************************************************* 48 * Perform any BL3-1 early platform setup, such as console init and deciding on 49 * memory layout. 50 ******************************************************************************/ 51 void bl31_early_platform_setup(bl31_params_t *from_bl2, 52 void *plat_params_from_bl2) 53 { 54 /* There are no parameters from BL2 if BL31 is a reset vector */ 55 assert(from_bl2 == NULL); 56 assert(plat_params_from_bl2 == NULL); 57 58 #ifdef BL32_BASE 59 /* Populate entry point information for BL32 */ 60 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); 61 bl32_image_ep_info.pc = BL32_BASE; 62 bl32_image_ep_info.spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, 63 DISABLE_ALL_EXCEPTIONS); 64 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); 65 #endif 66 67 /* Populate entry point information for BL33 */ 68 SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); 69 bl33_image_ep_info.pc = PRELOADED_BL33_BASE; 70 bl33_image_ep_info.spsr = k3_get_spsr_for_bl33_entry(); 71 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); 72 73 #ifdef K3_HW_CONFIG_BASE 74 /* 75 * According to the file ``Documentation/arm64/booting.txt`` of the 76 * Linux kernel tree, Linux expects the physical address of the device 77 * tree blob (DTB) in x0, while x1-x3 are reserved for future use and 78 * must be 0. 79 */ 80 bl33_image_ep_info.args.arg0 = (u_register_t)K3_HW_CONFIG_BASE; 81 bl33_image_ep_info.args.arg1 = 0U; 82 bl33_image_ep_info.args.arg2 = 0U; 83 bl33_image_ep_info.args.arg3 = 0U; 84 #endif 85 } 86 87 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 88 u_register_t arg2, u_register_t arg3) 89 { 90 bl31_early_platform_setup((void *)arg0, (void *)arg1); 91 } 92 93 void bl31_plat_arch_setup(void) 94 { 95 arm_setup_page_tables(BL31_BASE, 96 BL31_END - BL31_BASE, 97 BL_CODE_BASE, 98 BL_CODE_END, 99 BL_RO_DATA_BASE, 100 BL_RO_DATA_END); 101 enable_mmu_el3(0); 102 } 103 104 void bl31_platform_setup(void) 105 { 106 /* TODO: Initialize the GIC CPU and distributor interfaces */ 107 } 108 109 void platform_mem_init(void) 110 { 111 /* Do nothing for now... */ 112 } 113 114 /* 115 * Empty function to prevent the console from being uninitialized after BL33 is 116 * started and allow us to see messages from BL31. 117 */ 118 void bl31_plat_runtime_setup(void) 119 { 120 } 121 122 /******************************************************************************* 123 * Return a pointer to the 'entry_point_info' structure of the next image 124 * for the security state specified. BL3-3 corresponds to the non-secure 125 * image type while BL3-2 corresponds to the secure image type. A NULL 126 * pointer is returned if the image does not exist. 127 ******************************************************************************/ 128 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) 129 { 130 entry_point_info_t *next_image_info; 131 132 assert(sec_state_is_valid(type)); 133 next_image_info = (type == NON_SECURE) ? &bl33_image_ep_info : 134 &bl32_image_ep_info; 135 /* 136 * None of the images on the ARM development platforms can have 0x0 137 * as the entrypoint 138 */ 139 if (next_image_info->pc) 140 return next_image_info; 141 142 NOTICE("Requested nonexistent image\n"); 143 return NULL; 144 } 145