1 /* 2 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <arch.h> 8 #include <arch_helpers.h> 9 #include <assert.h> 10 #include <bl_common.h> 11 #include <debug.h> 12 #include <k3_console.h> 13 #include <plat_arm.h> 14 #include <platform_def.h> 15 #include <k3_gicv3.h> 16 #include <string.h> 17 18 /* Table of regions to map using the MMU */ 19 const mmap_region_t plat_arm_mmap[] = { 20 MAP_REGION_FLAT(SHARED_RAM_BASE, SHARED_RAM_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 21 MAP_REGION_FLAT(K3_USART_BASE_ADDRESS, K3_USART_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 22 MAP_REGION_FLAT(K3_GICD_BASE, K3_GICD_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 23 MAP_REGION_FLAT(K3_GICR_BASE, K3_GICR_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 24 MAP_REGION_FLAT(SEC_PROXY_RT_BASE, SEC_PROXY_RT_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 25 MAP_REGION_FLAT(SEC_PROXY_SCFG_BASE, SEC_PROXY_SCFG_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 26 MAP_REGION_FLAT(SEC_PROXY_DATA_BASE, SEC_PROXY_DATA_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 27 { /* sentinel */ } 28 }; 29 30 /* 31 * Placeholder variables for maintaining information about the next image(s) 32 */ 33 static entry_point_info_t bl32_image_ep_info; 34 static entry_point_info_t bl33_image_ep_info; 35 36 /******************************************************************************* 37 * Gets SPSR for BL33 entry 38 ******************************************************************************/ 39 static uint32_t k3_get_spsr_for_bl33_entry(void) 40 { 41 unsigned long el_status; 42 unsigned int mode; 43 uint32_t spsr; 44 45 /* Figure out what mode we enter the non-secure world in */ 46 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; 47 el_status &= ID_AA64PFR0_ELX_MASK; 48 49 mode = (el_status) ? MODE_EL2 : MODE_EL1; 50 51 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); 52 return spsr; 53 } 54 55 /******************************************************************************* 56 * Perform any BL3-1 early platform setup, such as console init and deciding on 57 * memory layout. 58 ******************************************************************************/ 59 void bl31_early_platform_setup(bl31_params_t *from_bl2, 60 void *plat_params_from_bl2) 61 { 62 /* There are no parameters from BL2 if BL31 is a reset vector */ 63 assert(from_bl2 == NULL); 64 assert(plat_params_from_bl2 == NULL); 65 66 bl31_console_setup(); 67 68 #ifdef BL32_BASE 69 /* Populate entry point information for BL32 */ 70 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); 71 bl32_image_ep_info.pc = BL32_BASE; 72 bl32_image_ep_info.spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, 73 DISABLE_ALL_EXCEPTIONS); 74 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); 75 #endif 76 77 /* Populate entry point information for BL33 */ 78 SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); 79 bl33_image_ep_info.pc = PRELOADED_BL33_BASE; 80 bl33_image_ep_info.spsr = k3_get_spsr_for_bl33_entry(); 81 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); 82 83 #ifdef K3_HW_CONFIG_BASE 84 /* 85 * According to the file ``Documentation/arm64/booting.txt`` of the 86 * Linux kernel tree, Linux expects the physical address of the device 87 * tree blob (DTB) in x0, while x1-x3 are reserved for future use and 88 * must be 0. 89 */ 90 bl33_image_ep_info.args.arg0 = (u_register_t)K3_HW_CONFIG_BASE; 91 bl33_image_ep_info.args.arg1 = 0U; 92 bl33_image_ep_info.args.arg2 = 0U; 93 bl33_image_ep_info.args.arg3 = 0U; 94 #endif 95 } 96 97 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 98 u_register_t arg2, u_register_t arg3) 99 { 100 bl31_early_platform_setup((void *)arg0, (void *)arg1); 101 } 102 103 void bl31_plat_arch_setup(void) 104 { 105 106 const mmap_region_t bl_regions[] = { 107 MAP_REGION_FLAT(BL31_BASE, BL31_END - BL31_BASE, 108 MT_MEMORY | MT_RW | MT_SECURE), 109 MAP_REGION_FLAT(BL_CODE_BASE, BL_CODE_END - BL_CODE_BASE, 110 MT_CODE | MT_SECURE), 111 MAP_REGION_FLAT(BL_RO_DATA_BASE, BL_RO_DATA_END - BL_RO_DATA_END, 112 MT_RO_DATA | MT_SECURE), 113 {0} 114 }; 115 116 arm_setup_page_tables(bl_regions, plat_arm_get_mmap()); 117 enable_mmu_el3(0); 118 } 119 120 void bl31_platform_setup(void) 121 { 122 k3_gic_driver_init(K3_GICD_BASE, K3_GICR_BASE); 123 k3_gic_init(); 124 } 125 126 void platform_mem_init(void) 127 { 128 /* Do nothing for now... */ 129 } 130 131 unsigned int plat_get_syscnt_freq2(void) 132 { 133 return SYS_COUNTER_FREQ_IN_TICKS; 134 } 135 136 /* 137 * Empty function to prevent the console from being uninitialized after BL33 is 138 * started and allow us to see messages from BL31. 139 */ 140 void bl31_plat_runtime_setup(void) 141 { 142 } 143 144 /******************************************************************************* 145 * Return a pointer to the 'entry_point_info' structure of the next image 146 * for the security state specified. BL3-3 corresponds to the non-secure 147 * image type while BL3-2 corresponds to the secure image type. A NULL 148 * pointer is returned if the image does not exist. 149 ******************************************************************************/ 150 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) 151 { 152 entry_point_info_t *next_image_info; 153 154 assert(sec_state_is_valid(type)); 155 next_image_info = (type == NON_SECURE) ? &bl33_image_ep_info : 156 &bl32_image_ep_info; 157 /* 158 * None of the images on the ARM development platforms can have 0x0 159 * as the entrypoint 160 */ 161 if (next_image_info->pc) 162 return next_image_info; 163 164 NOTICE("Requested nonexistent image\n"); 165 return NULL; 166 } 167