1 /* 2 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <string.h> 9 10 #include <platform_def.h> 11 12 #include <arch.h> 13 #include <arch_helpers.h> 14 #include <common/bl_common.h> 15 #include <common/debug.h> 16 #include <lib/xlat_tables/xlat_tables_v2.h> 17 18 #include <k3_console.h> 19 #include <k3_gicv3.h> 20 #include <ti_sci.h> 21 22 /* Table of regions to map using the MMU */ 23 const mmap_region_t plat_k3_mmap[] = { 24 MAP_REGION_FLAT(SHARED_RAM_BASE, SHARED_RAM_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 25 MAP_REGION_FLAT(K3_USART_BASE_ADDRESS, K3_USART_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 26 MAP_REGION_FLAT(K3_GIC_BASE, K3_GIC_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 27 MAP_REGION_FLAT(SEC_PROXY_RT_BASE, SEC_PROXY_RT_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 28 MAP_REGION_FLAT(SEC_PROXY_SCFG_BASE, SEC_PROXY_SCFG_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 29 MAP_REGION_FLAT(SEC_PROXY_DATA_BASE, SEC_PROXY_DATA_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 30 { /* sentinel */ } 31 }; 32 33 /* 34 * Placeholder variables for maintaining information about the next image(s) 35 */ 36 static entry_point_info_t bl32_image_ep_info; 37 static entry_point_info_t bl33_image_ep_info; 38 39 /******************************************************************************* 40 * Gets SPSR for BL33 entry 41 ******************************************************************************/ 42 static uint32_t k3_get_spsr_for_bl33_entry(void) 43 { 44 unsigned long el_status; 45 unsigned int mode; 46 uint32_t spsr; 47 48 /* Figure out what mode we enter the non-secure world in */ 49 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; 50 el_status &= ID_AA64PFR0_ELX_MASK; 51 52 mode = (el_status) ? MODE_EL2 : MODE_EL1; 53 54 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); 55 return spsr; 56 } 57 58 /******************************************************************************* 59 * Perform any BL3-1 early platform setup, such as console init and deciding on 60 * memory layout. 61 ******************************************************************************/ 62 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 63 u_register_t arg2, u_register_t arg3) 64 { 65 /* There are no parameters from BL2 if BL31 is a reset vector */ 66 assert(arg0 == 0U); 67 assert(arg1 == 0U); 68 69 bl31_console_setup(); 70 71 #ifdef BL32_BASE 72 /* Populate entry point information for BL32 */ 73 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); 74 bl32_image_ep_info.pc = BL32_BASE; 75 bl32_image_ep_info.spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, 76 DISABLE_ALL_EXCEPTIONS); 77 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); 78 #endif 79 80 /* Populate entry point information for BL33 */ 81 SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); 82 bl33_image_ep_info.pc = PRELOADED_BL33_BASE; 83 bl33_image_ep_info.spsr = k3_get_spsr_for_bl33_entry(); 84 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); 85 86 #ifdef K3_HW_CONFIG_BASE 87 /* 88 * According to the file ``Documentation/arm64/booting.txt`` of the 89 * Linux kernel tree, Linux expects the physical address of the device 90 * tree blob (DTB) in x0, while x1-x3 are reserved for future use and 91 * must be 0. 92 */ 93 bl33_image_ep_info.args.arg0 = (u_register_t)K3_HW_CONFIG_BASE; 94 bl33_image_ep_info.args.arg1 = 0U; 95 bl33_image_ep_info.args.arg2 = 0U; 96 bl33_image_ep_info.args.arg3 = 0U; 97 #endif 98 } 99 100 void bl31_plat_arch_setup(void) 101 { 102 const mmap_region_t bl_regions[] = { 103 MAP_REGION_FLAT(BL31_BASE, BL31_END - BL31_BASE, 104 MT_MEMORY | MT_RW | MT_SECURE), 105 MAP_REGION_FLAT(BL_CODE_BASE, BL_CODE_END - BL_CODE_BASE, 106 MT_CODE | MT_SECURE), 107 MAP_REGION_FLAT(BL_RO_DATA_BASE, BL_RO_DATA_END - BL_RO_DATA_END, 108 MT_RO_DATA | MT_SECURE), 109 {0} 110 }; 111 112 setup_page_tables(bl_regions, plat_k3_mmap); 113 enable_mmu_el3(0); 114 } 115 116 void bl31_platform_setup(void) 117 { 118 k3_gic_driver_init(K3_GIC_BASE); 119 k3_gic_init(); 120 121 ti_sci_init(); 122 } 123 124 void platform_mem_init(void) 125 { 126 /* Do nothing for now... */ 127 } 128 129 unsigned int plat_get_syscnt_freq2(void) 130 { 131 return SYS_COUNTER_FREQ_IN_TICKS; 132 } 133 134 /* 135 * Empty function to prevent the console from being uninitialized after BL33 is 136 * started and allow us to see messages from BL31. 137 */ 138 void bl31_plat_runtime_setup(void) 139 { 140 } 141 142 /******************************************************************************* 143 * Return a pointer to the 'entry_point_info' structure of the next image 144 * for the security state specified. BL3-3 corresponds to the non-secure 145 * image type while BL3-2 corresponds to the secure image type. A NULL 146 * pointer is returned if the image does not exist. 147 ******************************************************************************/ 148 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) 149 { 150 entry_point_info_t *next_image_info; 151 152 assert(sec_state_is_valid(type)); 153 next_image_info = (type == NON_SECURE) ? &bl33_image_ep_info : 154 &bl32_image_ep_info; 155 /* 156 * None of the images on the ARM development platforms can have 0x0 157 * as the entrypoint 158 */ 159 if (next_image_info->pc) 160 return next_image_info; 161 162 NOTICE("Requested nonexistent image\n"); 163 return NULL; 164 } 165