1 /* 2 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <arch.h> 8 #include <arch_helpers.h> 9 #include <assert.h> 10 #include <bl_common.h> 11 #include <debug.h> 12 #include <k3_console.h> 13 #include <plat_arm.h> 14 #include <platform_def.h> 15 #include <k3_gicv3.h> 16 #include <string.h> 17 18 /* Table of regions to map using the MMU */ 19 const mmap_region_t plat_arm_mmap[] = { 20 MAP_REGION_FLAT(SHARED_RAM_BASE, SHARED_RAM_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 21 MAP_REGION_FLAT(K3_USART_BASE_ADDRESS, K3_USART_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 22 MAP_REGION_FLAT(K3_GICD_BASE, K3_GICD_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 23 MAP_REGION_FLAT(K3_GICR_BASE, K3_GICR_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 24 { /* sentinel */ } 25 }; 26 27 /* 28 * Placeholder variables for maintaining information about the next image(s) 29 */ 30 static entry_point_info_t bl32_image_ep_info; 31 static entry_point_info_t bl33_image_ep_info; 32 33 /******************************************************************************* 34 * Gets SPSR for BL33 entry 35 ******************************************************************************/ 36 static uint32_t k3_get_spsr_for_bl33_entry(void) 37 { 38 unsigned long el_status; 39 unsigned int mode; 40 uint32_t spsr; 41 42 /* Figure out what mode we enter the non-secure world in */ 43 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; 44 el_status &= ID_AA64PFR0_ELX_MASK; 45 46 mode = (el_status) ? MODE_EL2 : MODE_EL1; 47 48 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); 49 return spsr; 50 } 51 52 /******************************************************************************* 53 * Perform any BL3-1 early platform setup, such as console init and deciding on 54 * memory layout. 55 ******************************************************************************/ 56 void bl31_early_platform_setup(bl31_params_t *from_bl2, 57 void *plat_params_from_bl2) 58 { 59 /* There are no parameters from BL2 if BL31 is a reset vector */ 60 assert(from_bl2 == NULL); 61 assert(plat_params_from_bl2 == NULL); 62 63 bl31_console_setup(); 64 65 #ifdef BL32_BASE 66 /* Populate entry point information for BL32 */ 67 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); 68 bl32_image_ep_info.pc = BL32_BASE; 69 bl32_image_ep_info.spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, 70 DISABLE_ALL_EXCEPTIONS); 71 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); 72 #endif 73 74 /* Populate entry point information for BL33 */ 75 SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); 76 bl33_image_ep_info.pc = PRELOADED_BL33_BASE; 77 bl33_image_ep_info.spsr = k3_get_spsr_for_bl33_entry(); 78 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); 79 80 #ifdef K3_HW_CONFIG_BASE 81 /* 82 * According to the file ``Documentation/arm64/booting.txt`` of the 83 * Linux kernel tree, Linux expects the physical address of the device 84 * tree blob (DTB) in x0, while x1-x3 are reserved for future use and 85 * must be 0. 86 */ 87 bl33_image_ep_info.args.arg0 = (u_register_t)K3_HW_CONFIG_BASE; 88 bl33_image_ep_info.args.arg1 = 0U; 89 bl33_image_ep_info.args.arg2 = 0U; 90 bl33_image_ep_info.args.arg3 = 0U; 91 #endif 92 } 93 94 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 95 u_register_t arg2, u_register_t arg3) 96 { 97 bl31_early_platform_setup((void *)arg0, (void *)arg1); 98 } 99 100 void bl31_plat_arch_setup(void) 101 { 102 103 const mmap_region_t bl_regions[] = { 104 MAP_REGION_FLAT(BL31_BASE, BL31_END - BL31_BASE, 105 MT_MEMORY | MT_RW | MT_SECURE), 106 MAP_REGION_FLAT(BL_CODE_BASE, BL_CODE_END - BL_CODE_BASE, 107 MT_CODE | MT_SECURE), 108 MAP_REGION_FLAT(BL_RO_DATA_BASE, BL_RO_DATA_END - BL_RO_DATA_END, 109 MT_RO_DATA | MT_SECURE), 110 {0} 111 }; 112 113 arm_setup_page_tables(bl_regions, plat_arm_get_mmap()); 114 enable_mmu_el3(0); 115 } 116 117 void bl31_platform_setup(void) 118 { 119 k3_gic_driver_init(K3_GICD_BASE, K3_GICR_BASE); 120 k3_gic_init(); 121 } 122 123 void platform_mem_init(void) 124 { 125 /* Do nothing for now... */ 126 } 127 128 unsigned int plat_get_syscnt_freq2(void) 129 { 130 return SYS_COUNTER_FREQ_IN_TICKS; 131 } 132 133 /* 134 * Empty function to prevent the console from being uninitialized after BL33 is 135 * started and allow us to see messages from BL31. 136 */ 137 void bl31_plat_runtime_setup(void) 138 { 139 } 140 141 /******************************************************************************* 142 * Return a pointer to the 'entry_point_info' structure of the next image 143 * for the security state specified. BL3-3 corresponds to the non-secure 144 * image type while BL3-2 corresponds to the secure image type. A NULL 145 * pointer is returned if the image does not exist. 146 ******************************************************************************/ 147 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) 148 { 149 entry_point_info_t *next_image_info; 150 151 assert(sec_state_is_valid(type)); 152 next_image_info = (type == NON_SECURE) ? &bl33_image_ep_info : 153 &bl32_image_ep_info; 154 /* 155 * None of the images on the ARM development platforms can have 0x0 156 * as the entrypoint 157 */ 158 if (next_image_info->pc) 159 return next_image_info; 160 161 NOTICE("Requested nonexistent image\n"); 162 return NULL; 163 } 164