11841c533SNishanth Menon /* 21841c533SNishanth Menon * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 31841c533SNishanth Menon * 41841c533SNishanth Menon * SPDX-License-Identifier: BSD-3-Clause 51841c533SNishanth Menon */ 61841c533SNishanth Menon 71841c533SNishanth Menon #include <arch.h> 81841c533SNishanth Menon #include <arch_helpers.h> 91841c533SNishanth Menon #include <assert.h> 101841c533SNishanth Menon #include <bl_common.h> 111841c533SNishanth Menon #include <debug.h> 12fff6ffcaSNishanth Menon #include <k3_console.h> 13e67bfcf3SNishanth Menon #include <plat_arm.h> 141841c533SNishanth Menon #include <platform_def.h> 1574e8cf48SNishanth Menon #include <k3_gicv3.h> 161841c533SNishanth Menon #include <string.h> 171841c533SNishanth Menon 18e67bfcf3SNishanth Menon /* Table of regions to map using the MMU */ 19e67bfcf3SNishanth Menon const mmap_region_t plat_arm_mmap[] = { 20e67bfcf3SNishanth Menon MAP_REGION_FLAT(SHARED_RAM_BASE, SHARED_RAM_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 21fff6ffcaSNishanth Menon MAP_REGION_FLAT(K3_USART_BASE_ADDRESS, K3_USART_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 2274e8cf48SNishanth Menon MAP_REGION_FLAT(K3_GICD_BASE, K3_GICD_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 2374e8cf48SNishanth Menon MAP_REGION_FLAT(K3_GICR_BASE, K3_GICR_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 24e67bfcf3SNishanth Menon { /* sentinel */ } 25e67bfcf3SNishanth Menon }; 26e67bfcf3SNishanth Menon 27a546d25bSBenjamin Fair /* 28a546d25bSBenjamin Fair * Placeholder variables for maintaining information about the next image(s) 29a546d25bSBenjamin Fair */ 30a546d25bSBenjamin Fair static entry_point_info_t bl32_image_ep_info; 31a546d25bSBenjamin Fair static entry_point_info_t bl33_image_ep_info; 32a546d25bSBenjamin Fair 33a546d25bSBenjamin Fair /******************************************************************************* 34a546d25bSBenjamin Fair * Gets SPSR for BL33 entry 35a546d25bSBenjamin Fair ******************************************************************************/ 36a546d25bSBenjamin Fair static uint32_t k3_get_spsr_for_bl33_entry(void) 37a546d25bSBenjamin Fair { 38a546d25bSBenjamin Fair unsigned long el_status; 39a546d25bSBenjamin Fair unsigned int mode; 40a546d25bSBenjamin Fair uint32_t spsr; 41a546d25bSBenjamin Fair 42a546d25bSBenjamin Fair /* Figure out what mode we enter the non-secure world in */ 43a546d25bSBenjamin Fair el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; 44a546d25bSBenjamin Fair el_status &= ID_AA64PFR0_ELX_MASK; 45a546d25bSBenjamin Fair 46a546d25bSBenjamin Fair mode = (el_status) ? MODE_EL2 : MODE_EL1; 47a546d25bSBenjamin Fair 48a546d25bSBenjamin Fair spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); 49a546d25bSBenjamin Fair return spsr; 50a546d25bSBenjamin Fair } 51a546d25bSBenjamin Fair 521841c533SNishanth Menon /******************************************************************************* 531841c533SNishanth Menon * Perform any BL3-1 early platform setup, such as console init and deciding on 541841c533SNishanth Menon * memory layout. 551841c533SNishanth Menon ******************************************************************************/ 561841c533SNishanth Menon void bl31_early_platform_setup(bl31_params_t *from_bl2, 571841c533SNishanth Menon void *plat_params_from_bl2) 581841c533SNishanth Menon { 591841c533SNishanth Menon /* There are no parameters from BL2 if BL31 is a reset vector */ 601841c533SNishanth Menon assert(from_bl2 == NULL); 611841c533SNishanth Menon assert(plat_params_from_bl2 == NULL); 62a546d25bSBenjamin Fair 63fff6ffcaSNishanth Menon bl31_console_setup(); 64fff6ffcaSNishanth Menon 65a546d25bSBenjamin Fair #ifdef BL32_BASE 66a546d25bSBenjamin Fair /* Populate entry point information for BL32 */ 67a546d25bSBenjamin Fair SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); 68a546d25bSBenjamin Fair bl32_image_ep_info.pc = BL32_BASE; 69a546d25bSBenjamin Fair bl32_image_ep_info.spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, 70a546d25bSBenjamin Fair DISABLE_ALL_EXCEPTIONS); 71a546d25bSBenjamin Fair SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); 72a546d25bSBenjamin Fair #endif 73a546d25bSBenjamin Fair 74a546d25bSBenjamin Fair /* Populate entry point information for BL33 */ 75a546d25bSBenjamin Fair SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); 76a546d25bSBenjamin Fair bl33_image_ep_info.pc = PRELOADED_BL33_BASE; 77a546d25bSBenjamin Fair bl33_image_ep_info.spsr = k3_get_spsr_for_bl33_entry(); 78a546d25bSBenjamin Fair SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); 79a546d25bSBenjamin Fair 80a546d25bSBenjamin Fair #ifdef K3_HW_CONFIG_BASE 81a546d25bSBenjamin Fair /* 82a546d25bSBenjamin Fair * According to the file ``Documentation/arm64/booting.txt`` of the 83a546d25bSBenjamin Fair * Linux kernel tree, Linux expects the physical address of the device 84a546d25bSBenjamin Fair * tree blob (DTB) in x0, while x1-x3 are reserved for future use and 85a546d25bSBenjamin Fair * must be 0. 86a546d25bSBenjamin Fair */ 87a546d25bSBenjamin Fair bl33_image_ep_info.args.arg0 = (u_register_t)K3_HW_CONFIG_BASE; 88a546d25bSBenjamin Fair bl33_image_ep_info.args.arg1 = 0U; 89a546d25bSBenjamin Fair bl33_image_ep_info.args.arg2 = 0U; 90a546d25bSBenjamin Fair bl33_image_ep_info.args.arg3 = 0U; 91a546d25bSBenjamin Fair #endif 921841c533SNishanth Menon } 931841c533SNishanth Menon 941841c533SNishanth Menon void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 951841c533SNishanth Menon u_register_t arg2, u_register_t arg3) 961841c533SNishanth Menon { 971841c533SNishanth Menon bl31_early_platform_setup((void *)arg0, (void *)arg1); 981841c533SNishanth Menon } 991841c533SNishanth Menon 1001841c533SNishanth Menon void bl31_plat_arch_setup(void) 1011841c533SNishanth Menon { 102*d323af9eSDaniel Boulby 103*d323af9eSDaniel Boulby const mmap_region_t bl_regions[] = { 104*d323af9eSDaniel Boulby MAP_REGION_FLAT(BL31_BASE, BL31_END - BL31_BASE, 105*d323af9eSDaniel Boulby MT_MEMORY | MT_RW | MT_SECURE), 106*d323af9eSDaniel Boulby MAP_REGION_FLAT(BL_CODE_BASE, BL_CODE_END - BL_CODE_BASE, 107*d323af9eSDaniel Boulby MT_CODE | MT_SECURE), 108*d323af9eSDaniel Boulby MAP_REGION_FLAT(BL_RO_DATA_BASE, BL_RO_DATA_END - BL_RO_DATA_END, 109*d323af9eSDaniel Boulby MT_RO_DATA | MT_SECURE), 110*d323af9eSDaniel Boulby {0} 111*d323af9eSDaniel Boulby }; 112*d323af9eSDaniel Boulby 113*d323af9eSDaniel Boulby arm_setup_page_tables(bl_regions, plat_arm_get_mmap()); 114e67bfcf3SNishanth Menon enable_mmu_el3(0); 1151841c533SNishanth Menon } 1161841c533SNishanth Menon 1171841c533SNishanth Menon void bl31_platform_setup(void) 1181841c533SNishanth Menon { 11974e8cf48SNishanth Menon k3_gic_driver_init(K3_GICD_BASE, K3_GICR_BASE); 12074e8cf48SNishanth Menon k3_gic_init(); 1211841c533SNishanth Menon } 1221841c533SNishanth Menon 1231841c533SNishanth Menon void platform_mem_init(void) 1241841c533SNishanth Menon { 1251841c533SNishanth Menon /* Do nothing for now... */ 1261841c533SNishanth Menon } 1271841c533SNishanth Menon 128e9cb89cfSNishanth Menon unsigned int plat_get_syscnt_freq2(void) 129e9cb89cfSNishanth Menon { 130e9cb89cfSNishanth Menon return SYS_COUNTER_FREQ_IN_TICKS; 131e9cb89cfSNishanth Menon } 132e9cb89cfSNishanth Menon 1331841c533SNishanth Menon /* 1341841c533SNishanth Menon * Empty function to prevent the console from being uninitialized after BL33 is 1351841c533SNishanth Menon * started and allow us to see messages from BL31. 1361841c533SNishanth Menon */ 1371841c533SNishanth Menon void bl31_plat_runtime_setup(void) 1381841c533SNishanth Menon { 1391841c533SNishanth Menon } 1401841c533SNishanth Menon 1411841c533SNishanth Menon /******************************************************************************* 1421841c533SNishanth Menon * Return a pointer to the 'entry_point_info' structure of the next image 1431841c533SNishanth Menon * for the security state specified. BL3-3 corresponds to the non-secure 1441841c533SNishanth Menon * image type while BL3-2 corresponds to the secure image type. A NULL 1451841c533SNishanth Menon * pointer is returned if the image does not exist. 1461841c533SNishanth Menon ******************************************************************************/ 1471841c533SNishanth Menon entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) 1481841c533SNishanth Menon { 149a546d25bSBenjamin Fair entry_point_info_t *next_image_info; 150a546d25bSBenjamin Fair 151a546d25bSBenjamin Fair assert(sec_state_is_valid(type)); 152a546d25bSBenjamin Fair next_image_info = (type == NON_SECURE) ? &bl33_image_ep_info : 153a546d25bSBenjamin Fair &bl32_image_ep_info; 154a546d25bSBenjamin Fair /* 155a546d25bSBenjamin Fair * None of the images on the ARM development platforms can have 0x0 156a546d25bSBenjamin Fair * as the entrypoint 157a546d25bSBenjamin Fair */ 158a546d25bSBenjamin Fair if (next_image_info->pc) 159a546d25bSBenjamin Fair return next_image_info; 160a546d25bSBenjamin Fair 161a546d25bSBenjamin Fair NOTICE("Requested nonexistent image\n"); 1621841c533SNishanth Menon return NULL; 1631841c533SNishanth Menon } 164