xref: /rk3399_ARM-atf/plat/ti/k3/common/k3_bl31_setup.c (revision a546d25b1e1af0d6b9dea272fb6950d46a4cf56d)
11841c533SNishanth Menon /*
21841c533SNishanth Menon  * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
31841c533SNishanth Menon  *
41841c533SNishanth Menon  * SPDX-License-Identifier: BSD-3-Clause
51841c533SNishanth Menon  */
61841c533SNishanth Menon 
71841c533SNishanth Menon #include <arch.h>
81841c533SNishanth Menon #include <arch_helpers.h>
91841c533SNishanth Menon #include <assert.h>
101841c533SNishanth Menon #include <bl_common.h>
111841c533SNishanth Menon #include <debug.h>
121841c533SNishanth Menon #include <platform_def.h>
131841c533SNishanth Menon #include <string.h>
141841c533SNishanth Menon 
15*a546d25bSBenjamin Fair /*
16*a546d25bSBenjamin Fair  * Placeholder variables for maintaining information about the next image(s)
17*a546d25bSBenjamin Fair  */
18*a546d25bSBenjamin Fair static entry_point_info_t bl32_image_ep_info;
19*a546d25bSBenjamin Fair static entry_point_info_t bl33_image_ep_info;
20*a546d25bSBenjamin Fair 
21*a546d25bSBenjamin Fair /*******************************************************************************
22*a546d25bSBenjamin Fair  * Gets SPSR for BL33 entry
23*a546d25bSBenjamin Fair  ******************************************************************************/
24*a546d25bSBenjamin Fair static uint32_t k3_get_spsr_for_bl33_entry(void)
25*a546d25bSBenjamin Fair {
26*a546d25bSBenjamin Fair 	unsigned long el_status;
27*a546d25bSBenjamin Fair 	unsigned int mode;
28*a546d25bSBenjamin Fair 	uint32_t spsr;
29*a546d25bSBenjamin Fair 
30*a546d25bSBenjamin Fair 	/* Figure out what mode we enter the non-secure world in */
31*a546d25bSBenjamin Fair 	el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT;
32*a546d25bSBenjamin Fair 	el_status &= ID_AA64PFR0_ELX_MASK;
33*a546d25bSBenjamin Fair 
34*a546d25bSBenjamin Fair 	mode = (el_status) ? MODE_EL2 : MODE_EL1;
35*a546d25bSBenjamin Fair 
36*a546d25bSBenjamin Fair 	spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
37*a546d25bSBenjamin Fair 	return spsr;
38*a546d25bSBenjamin Fair }
39*a546d25bSBenjamin Fair 
401841c533SNishanth Menon /*******************************************************************************
411841c533SNishanth Menon  * Perform any BL3-1 early platform setup, such as console init and deciding on
421841c533SNishanth Menon  * memory layout.
431841c533SNishanth Menon  ******************************************************************************/
441841c533SNishanth Menon void bl31_early_platform_setup(bl31_params_t *from_bl2,
451841c533SNishanth Menon 			       void *plat_params_from_bl2)
461841c533SNishanth Menon {
471841c533SNishanth Menon 	/* There are no parameters from BL2 if BL31 is a reset vector */
481841c533SNishanth Menon 	assert(from_bl2 == NULL);
491841c533SNishanth Menon 	assert(plat_params_from_bl2 == NULL);
50*a546d25bSBenjamin Fair 
51*a546d25bSBenjamin Fair #ifdef BL32_BASE
52*a546d25bSBenjamin Fair 	/* Populate entry point information for BL32 */
53*a546d25bSBenjamin Fair 	SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0);
54*a546d25bSBenjamin Fair 	bl32_image_ep_info.pc = BL32_BASE;
55*a546d25bSBenjamin Fair 	bl32_image_ep_info.spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
56*a546d25bSBenjamin Fair 					  DISABLE_ALL_EXCEPTIONS);
57*a546d25bSBenjamin Fair 	SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
58*a546d25bSBenjamin Fair #endif
59*a546d25bSBenjamin Fair 
60*a546d25bSBenjamin Fair 	/* Populate entry point information for BL33 */
61*a546d25bSBenjamin Fair 	SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0);
62*a546d25bSBenjamin Fair 	bl33_image_ep_info.pc = PRELOADED_BL33_BASE;
63*a546d25bSBenjamin Fair 	bl33_image_ep_info.spsr = k3_get_spsr_for_bl33_entry();
64*a546d25bSBenjamin Fair 	SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE);
65*a546d25bSBenjamin Fair 
66*a546d25bSBenjamin Fair #ifdef K3_HW_CONFIG_BASE
67*a546d25bSBenjamin Fair 	/*
68*a546d25bSBenjamin Fair 	 * According to the file ``Documentation/arm64/booting.txt`` of the
69*a546d25bSBenjamin Fair 	 * Linux kernel tree, Linux expects the physical address of the device
70*a546d25bSBenjamin Fair 	 * tree blob (DTB) in x0, while x1-x3 are reserved for future use and
71*a546d25bSBenjamin Fair 	 * must be 0.
72*a546d25bSBenjamin Fair 	 */
73*a546d25bSBenjamin Fair 	bl33_image_ep_info.args.arg0 = (u_register_t)K3_HW_CONFIG_BASE;
74*a546d25bSBenjamin Fair 	bl33_image_ep_info.args.arg1 = 0U;
75*a546d25bSBenjamin Fair 	bl33_image_ep_info.args.arg2 = 0U;
76*a546d25bSBenjamin Fair 	bl33_image_ep_info.args.arg3 = 0U;
77*a546d25bSBenjamin Fair #endif
781841c533SNishanth Menon }
791841c533SNishanth Menon 
801841c533SNishanth Menon void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
811841c533SNishanth Menon 				u_register_t arg2, u_register_t arg3)
821841c533SNishanth Menon {
831841c533SNishanth Menon 	bl31_early_platform_setup((void *)arg0, (void *)arg1);
841841c533SNishanth Menon }
851841c533SNishanth Menon 
861841c533SNishanth Menon void bl31_plat_arch_setup(void)
871841c533SNishanth Menon {
881841c533SNishanth Menon 	/* TODO: Initialize the MMU tables */
891841c533SNishanth Menon }
901841c533SNishanth Menon 
911841c533SNishanth Menon void bl31_platform_setup(void)
921841c533SNishanth Menon {
931841c533SNishanth Menon 	/* TODO: Initialize the GIC CPU and distributor interfaces */
941841c533SNishanth Menon }
951841c533SNishanth Menon 
961841c533SNishanth Menon void platform_mem_init(void)
971841c533SNishanth Menon {
981841c533SNishanth Menon 	/* Do nothing for now... */
991841c533SNishanth Menon }
1001841c533SNishanth Menon 
1011841c533SNishanth Menon /*
1021841c533SNishanth Menon  * Empty function to prevent the console from being uninitialized after BL33 is
1031841c533SNishanth Menon  * started and allow us to see messages from BL31.
1041841c533SNishanth Menon  */
1051841c533SNishanth Menon void bl31_plat_runtime_setup(void)
1061841c533SNishanth Menon {
1071841c533SNishanth Menon }
1081841c533SNishanth Menon 
1091841c533SNishanth Menon /*******************************************************************************
1101841c533SNishanth Menon  * Return a pointer to the 'entry_point_info' structure of the next image
1111841c533SNishanth Menon  * for the security state specified. BL3-3 corresponds to the non-secure
1121841c533SNishanth Menon  * image type while BL3-2 corresponds to the secure image type. A NULL
1131841c533SNishanth Menon  * pointer is returned if the image does not exist.
1141841c533SNishanth Menon  ******************************************************************************/
1151841c533SNishanth Menon entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
1161841c533SNishanth Menon {
117*a546d25bSBenjamin Fair 	entry_point_info_t *next_image_info;
118*a546d25bSBenjamin Fair 
119*a546d25bSBenjamin Fair 	assert(sec_state_is_valid(type));
120*a546d25bSBenjamin Fair 	next_image_info = (type == NON_SECURE) ? &bl33_image_ep_info :
121*a546d25bSBenjamin Fair 						 &bl32_image_ep_info;
122*a546d25bSBenjamin Fair 	/*
123*a546d25bSBenjamin Fair 	 * None of the images on the ARM development platforms can have 0x0
124*a546d25bSBenjamin Fair 	 * as the entrypoint
125*a546d25bSBenjamin Fair 	 */
126*a546d25bSBenjamin Fair 	if (next_image_info->pc)
127*a546d25bSBenjamin Fair 		return next_image_info;
128*a546d25bSBenjamin Fair 
129*a546d25bSBenjamin Fair 	NOTICE("Requested nonexistent image\n");
1301841c533SNishanth Menon 	return NULL;
1311841c533SNishanth Menon }
132