11841c533SNishanth Menon /* 21841c533SNishanth Menon * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 31841c533SNishanth Menon * 41841c533SNishanth Menon * SPDX-License-Identifier: BSD-3-Clause 51841c533SNishanth Menon */ 61841c533SNishanth Menon 709d40e0eSAntonio Nino Diaz #include <assert.h> 809d40e0eSAntonio Nino Diaz #include <string.h> 909d40e0eSAntonio Nino Diaz 1009d40e0eSAntonio Nino Diaz #include <platform_def.h> 1109d40e0eSAntonio Nino Diaz 121841c533SNishanth Menon #include <arch.h> 131841c533SNishanth Menon #include <arch_helpers.h> 1409d40e0eSAntonio Nino Diaz #include <common/bl_common.h> 1509d40e0eSAntonio Nino Diaz #include <common/debug.h> 1609d40e0eSAntonio Nino Diaz #include <lib/xlat_tables/xlat_tables_v2.h> 1709d40e0eSAntonio Nino Diaz 18fff6ffcaSNishanth Menon #include <k3_console.h> 1974e8cf48SNishanth Menon #include <k3_gicv3.h> 20b5c2e1c4SAndrew F. Davis #include <ti_sci.h> 211841c533SNishanth Menon 22e67bfcf3SNishanth Menon /* Table of regions to map using the MMU */ 23ef202857SAndrew F. Davis const mmap_region_t plat_k3_mmap[] = { 24a481f8b8SAndrew F. Davis MAP_REGION_FLAT(K3_USART_BASE, K3_USART_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 25b5443284SAndrew F. Davis MAP_REGION_FLAT(K3_GIC_BASE, K3_GIC_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 26d76fdd33SAndrew F. Davis MAP_REGION_FLAT(SEC_PROXY_RT_BASE, SEC_PROXY_RT_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 27d76fdd33SAndrew F. Davis MAP_REGION_FLAT(SEC_PROXY_SCFG_BASE, SEC_PROXY_SCFG_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 28d76fdd33SAndrew F. Davis MAP_REGION_FLAT(SEC_PROXY_DATA_BASE, SEC_PROXY_DATA_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 29e67bfcf3SNishanth Menon { /* sentinel */ } 30e67bfcf3SNishanth Menon }; 31e67bfcf3SNishanth Menon 32a546d25bSBenjamin Fair /* 33a546d25bSBenjamin Fair * Placeholder variables for maintaining information about the next image(s) 34a546d25bSBenjamin Fair */ 35a546d25bSBenjamin Fair static entry_point_info_t bl32_image_ep_info; 36a546d25bSBenjamin Fair static entry_point_info_t bl33_image_ep_info; 37a546d25bSBenjamin Fair 38a546d25bSBenjamin Fair /******************************************************************************* 39a546d25bSBenjamin Fair * Gets SPSR for BL33 entry 40a546d25bSBenjamin Fair ******************************************************************************/ 41a546d25bSBenjamin Fair static uint32_t k3_get_spsr_for_bl33_entry(void) 42a546d25bSBenjamin Fair { 43a546d25bSBenjamin Fair unsigned long el_status; 44a546d25bSBenjamin Fair unsigned int mode; 45a546d25bSBenjamin Fair uint32_t spsr; 46a546d25bSBenjamin Fair 47a546d25bSBenjamin Fair /* Figure out what mode we enter the non-secure world in */ 48a546d25bSBenjamin Fair el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; 49a546d25bSBenjamin Fair el_status &= ID_AA64PFR0_ELX_MASK; 50a546d25bSBenjamin Fair 51a546d25bSBenjamin Fair mode = (el_status) ? MODE_EL2 : MODE_EL1; 52a546d25bSBenjamin Fair 53a546d25bSBenjamin Fair spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); 54a546d25bSBenjamin Fair return spsr; 55a546d25bSBenjamin Fair } 56a546d25bSBenjamin Fair 571841c533SNishanth Menon /******************************************************************************* 581841c533SNishanth Menon * Perform any BL3-1 early platform setup, such as console init and deciding on 591841c533SNishanth Menon * memory layout. 601841c533SNishanth Menon ******************************************************************************/ 6170451470SAntonio Nino Diaz void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 6270451470SAntonio Nino Diaz u_register_t arg2, u_register_t arg3) 631841c533SNishanth Menon { 641841c533SNishanth Menon /* There are no parameters from BL2 if BL31 is a reset vector */ 6570451470SAntonio Nino Diaz assert(arg0 == 0U); 6670451470SAntonio Nino Diaz assert(arg1 == 0U); 67a546d25bSBenjamin Fair 68fff6ffcaSNishanth Menon bl31_console_setup(); 69fff6ffcaSNishanth Menon 70a546d25bSBenjamin Fair #ifdef BL32_BASE 71a546d25bSBenjamin Fair /* Populate entry point information for BL32 */ 72a546d25bSBenjamin Fair SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); 73a546d25bSBenjamin Fair bl32_image_ep_info.pc = BL32_BASE; 74a546d25bSBenjamin Fair bl32_image_ep_info.spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, 75a546d25bSBenjamin Fair DISABLE_ALL_EXCEPTIONS); 76a546d25bSBenjamin Fair SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); 77a546d25bSBenjamin Fair #endif 78a546d25bSBenjamin Fair 79a546d25bSBenjamin Fair /* Populate entry point information for BL33 */ 80a546d25bSBenjamin Fair SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); 81a546d25bSBenjamin Fair bl33_image_ep_info.pc = PRELOADED_BL33_BASE; 82a546d25bSBenjamin Fair bl33_image_ep_info.spsr = k3_get_spsr_for_bl33_entry(); 83a546d25bSBenjamin Fair SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); 84a546d25bSBenjamin Fair 85a546d25bSBenjamin Fair #ifdef K3_HW_CONFIG_BASE 86a546d25bSBenjamin Fair /* 87a546d25bSBenjamin Fair * According to the file ``Documentation/arm64/booting.txt`` of the 88a546d25bSBenjamin Fair * Linux kernel tree, Linux expects the physical address of the device 89a546d25bSBenjamin Fair * tree blob (DTB) in x0, while x1-x3 are reserved for future use and 90a546d25bSBenjamin Fair * must be 0. 91a546d25bSBenjamin Fair */ 92a546d25bSBenjamin Fair bl33_image_ep_info.args.arg0 = (u_register_t)K3_HW_CONFIG_BASE; 93a546d25bSBenjamin Fair bl33_image_ep_info.args.arg1 = 0U; 94a546d25bSBenjamin Fair bl33_image_ep_info.args.arg2 = 0U; 95a546d25bSBenjamin Fair bl33_image_ep_info.args.arg3 = 0U; 96a546d25bSBenjamin Fair #endif 971841c533SNishanth Menon } 981841c533SNishanth Menon 991841c533SNishanth Menon void bl31_plat_arch_setup(void) 1001841c533SNishanth Menon { 101d323af9eSDaniel Boulby const mmap_region_t bl_regions[] = { 102*883eab2bSAndrew F. Davis MAP_REGION_FLAT(BL31_START, BL31_END - BL31_START, MT_MEMORY | MT_RW | MT_SECURE), 103*883eab2bSAndrew F. Davis MAP_REGION_FLAT(BL_CODE_BASE, BL_CODE_END - BL_CODE_BASE, MT_CODE | MT_RO | MT_SECURE), 104*883eab2bSAndrew F. Davis MAP_REGION_FLAT(BL_RO_DATA_BASE, BL_RO_DATA_END - BL_RO_DATA_END, MT_RO_DATA | MT_RO | MT_SECURE), 105*883eab2bSAndrew F. Davis { /* sentinel */ } 106d323af9eSDaniel Boulby }; 107d323af9eSDaniel Boulby 108ef202857SAndrew F. Davis setup_page_tables(bl_regions, plat_k3_mmap); 109e67bfcf3SNishanth Menon enable_mmu_el3(0); 1101841c533SNishanth Menon } 1111841c533SNishanth Menon 1121841c533SNishanth Menon void bl31_platform_setup(void) 1131841c533SNishanth Menon { 114b5443284SAndrew F. Davis k3_gic_driver_init(K3_GIC_BASE); 11574e8cf48SNishanth Menon k3_gic_init(); 116b5c2e1c4SAndrew F. Davis 117b5c2e1c4SAndrew F. Davis ti_sci_init(); 1181841c533SNishanth Menon } 1191841c533SNishanth Menon 1201841c533SNishanth Menon void platform_mem_init(void) 1211841c533SNishanth Menon { 1221841c533SNishanth Menon /* Do nothing for now... */ 1231841c533SNishanth Menon } 1241841c533SNishanth Menon 125e9cb89cfSNishanth Menon unsigned int plat_get_syscnt_freq2(void) 126e9cb89cfSNishanth Menon { 127e9cb89cfSNishanth Menon return SYS_COUNTER_FREQ_IN_TICKS; 128e9cb89cfSNishanth Menon } 129e9cb89cfSNishanth Menon 1301841c533SNishanth Menon /* 1311841c533SNishanth Menon * Empty function to prevent the console from being uninitialized after BL33 is 1321841c533SNishanth Menon * started and allow us to see messages from BL31. 1331841c533SNishanth Menon */ 1341841c533SNishanth Menon void bl31_plat_runtime_setup(void) 1351841c533SNishanth Menon { 1361841c533SNishanth Menon } 1371841c533SNishanth Menon 1381841c533SNishanth Menon /******************************************************************************* 1391841c533SNishanth Menon * Return a pointer to the 'entry_point_info' structure of the next image 1401841c533SNishanth Menon * for the security state specified. BL3-3 corresponds to the non-secure 1411841c533SNishanth Menon * image type while BL3-2 corresponds to the secure image type. A NULL 1421841c533SNishanth Menon * pointer is returned if the image does not exist. 1431841c533SNishanth Menon ******************************************************************************/ 1441841c533SNishanth Menon entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) 1451841c533SNishanth Menon { 146a546d25bSBenjamin Fair entry_point_info_t *next_image_info; 147a546d25bSBenjamin Fair 148a546d25bSBenjamin Fair assert(sec_state_is_valid(type)); 149a546d25bSBenjamin Fair next_image_info = (type == NON_SECURE) ? &bl33_image_ep_info : 150a546d25bSBenjamin Fair &bl32_image_ep_info; 151a546d25bSBenjamin Fair /* 152a546d25bSBenjamin Fair * None of the images on the ARM development platforms can have 0x0 153a546d25bSBenjamin Fair * as the entrypoint 154a546d25bSBenjamin Fair */ 155a546d25bSBenjamin Fair if (next_image_info->pc) 156a546d25bSBenjamin Fair return next_image_info; 157a546d25bSBenjamin Fair 158a546d25bSBenjamin Fair NOTICE("Requested nonexistent image\n"); 1591841c533SNishanth Menon return NULL; 1601841c533SNishanth Menon } 161