xref: /rk3399_ARM-atf/plat/ti/k3/common/k3_bl31_setup.c (revision 09d40e0e08283a249e7dce0e106c07c5141f9b7e)
11841c533SNishanth Menon /*
21841c533SNishanth Menon  * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
31841c533SNishanth Menon  *
41841c533SNishanth Menon  * SPDX-License-Identifier: BSD-3-Clause
51841c533SNishanth Menon  */
61841c533SNishanth Menon 
7*09d40e0eSAntonio Nino Diaz #include <assert.h>
8*09d40e0eSAntonio Nino Diaz #include <string.h>
9*09d40e0eSAntonio Nino Diaz 
10*09d40e0eSAntonio Nino Diaz #include <platform_def.h>
11*09d40e0eSAntonio Nino Diaz 
121841c533SNishanth Menon #include <arch.h>
131841c533SNishanth Menon #include <arch_helpers.h>
14*09d40e0eSAntonio Nino Diaz #include <common/bl_common.h>
15*09d40e0eSAntonio Nino Diaz #include <common/debug.h>
16*09d40e0eSAntonio Nino Diaz #include <lib/xlat_tables/xlat_tables_v2.h>
17*09d40e0eSAntonio Nino Diaz 
18fff6ffcaSNishanth Menon #include <k3_console.h>
1974e8cf48SNishanth Menon #include <k3_gicv3.h>
20b5c2e1c4SAndrew F. Davis #include <ti_sci.h>
211841c533SNishanth Menon 
22e67bfcf3SNishanth Menon /* Table of regions to map using the MMU */
23ef202857SAndrew F. Davis const mmap_region_t plat_k3_mmap[] = {
24e67bfcf3SNishanth Menon 	MAP_REGION_FLAT(SHARED_RAM_BASE, SHARED_RAM_SIZE, MT_DEVICE | MT_RW | MT_SECURE),
25fff6ffcaSNishanth Menon 	MAP_REGION_FLAT(K3_USART_BASE_ADDRESS, K3_USART_SIZE, MT_DEVICE | MT_RW | MT_SECURE),
2674e8cf48SNishanth Menon 	MAP_REGION_FLAT(K3_GICD_BASE, K3_GICD_SIZE, MT_DEVICE | MT_RW | MT_SECURE),
2774e8cf48SNishanth Menon 	MAP_REGION_FLAT(K3_GICR_BASE, K3_GICR_SIZE, MT_DEVICE | MT_RW | MT_SECURE),
28d76fdd33SAndrew F. Davis 	MAP_REGION_FLAT(SEC_PROXY_RT_BASE, SEC_PROXY_RT_SIZE, MT_DEVICE | MT_RW | MT_SECURE),
29d76fdd33SAndrew F. Davis 	MAP_REGION_FLAT(SEC_PROXY_SCFG_BASE, SEC_PROXY_SCFG_SIZE, MT_DEVICE | MT_RW | MT_SECURE),
30d76fdd33SAndrew F. Davis 	MAP_REGION_FLAT(SEC_PROXY_DATA_BASE, SEC_PROXY_DATA_SIZE, MT_DEVICE | MT_RW | MT_SECURE),
31e67bfcf3SNishanth Menon 	{ /* sentinel */ }
32e67bfcf3SNishanth Menon };
33e67bfcf3SNishanth Menon 
34a546d25bSBenjamin Fair /*
35a546d25bSBenjamin Fair  * Placeholder variables for maintaining information about the next image(s)
36a546d25bSBenjamin Fair  */
37a546d25bSBenjamin Fair static entry_point_info_t bl32_image_ep_info;
38a546d25bSBenjamin Fair static entry_point_info_t bl33_image_ep_info;
39a546d25bSBenjamin Fair 
40a546d25bSBenjamin Fair /*******************************************************************************
41a546d25bSBenjamin Fair  * Gets SPSR for BL33 entry
42a546d25bSBenjamin Fair  ******************************************************************************/
43a546d25bSBenjamin Fair static uint32_t k3_get_spsr_for_bl33_entry(void)
44a546d25bSBenjamin Fair {
45a546d25bSBenjamin Fair 	unsigned long el_status;
46a546d25bSBenjamin Fair 	unsigned int mode;
47a546d25bSBenjamin Fair 	uint32_t spsr;
48a546d25bSBenjamin Fair 
49a546d25bSBenjamin Fair 	/* Figure out what mode we enter the non-secure world in */
50a546d25bSBenjamin Fair 	el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT;
51a546d25bSBenjamin Fair 	el_status &= ID_AA64PFR0_ELX_MASK;
52a546d25bSBenjamin Fair 
53a546d25bSBenjamin Fair 	mode = (el_status) ? MODE_EL2 : MODE_EL1;
54a546d25bSBenjamin Fair 
55a546d25bSBenjamin Fair 	spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
56a546d25bSBenjamin Fair 	return spsr;
57a546d25bSBenjamin Fair }
58a546d25bSBenjamin Fair 
591841c533SNishanth Menon /*******************************************************************************
601841c533SNishanth Menon  * Perform any BL3-1 early platform setup, such as console init and deciding on
611841c533SNishanth Menon  * memory layout.
621841c533SNishanth Menon  ******************************************************************************/
6370451470SAntonio Nino Diaz void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
6470451470SAntonio Nino Diaz 				u_register_t arg2, u_register_t arg3)
651841c533SNishanth Menon {
661841c533SNishanth Menon 	/* There are no parameters from BL2 if BL31 is a reset vector */
6770451470SAntonio Nino Diaz 	assert(arg0 == 0U);
6870451470SAntonio Nino Diaz 	assert(arg1 == 0U);
69a546d25bSBenjamin Fair 
70fff6ffcaSNishanth Menon 	bl31_console_setup();
71fff6ffcaSNishanth Menon 
72a546d25bSBenjamin Fair #ifdef BL32_BASE
73a546d25bSBenjamin Fair 	/* Populate entry point information for BL32 */
74a546d25bSBenjamin Fair 	SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0);
75a546d25bSBenjamin Fair 	bl32_image_ep_info.pc = BL32_BASE;
76a546d25bSBenjamin Fair 	bl32_image_ep_info.spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
77a546d25bSBenjamin Fair 					  DISABLE_ALL_EXCEPTIONS);
78a546d25bSBenjamin Fair 	SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
79a546d25bSBenjamin Fair #endif
80a546d25bSBenjamin Fair 
81a546d25bSBenjamin Fair 	/* Populate entry point information for BL33 */
82a546d25bSBenjamin Fair 	SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0);
83a546d25bSBenjamin Fair 	bl33_image_ep_info.pc = PRELOADED_BL33_BASE;
84a546d25bSBenjamin Fair 	bl33_image_ep_info.spsr = k3_get_spsr_for_bl33_entry();
85a546d25bSBenjamin Fair 	SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE);
86a546d25bSBenjamin Fair 
87a546d25bSBenjamin Fair #ifdef K3_HW_CONFIG_BASE
88a546d25bSBenjamin Fair 	/*
89a546d25bSBenjamin Fair 	 * According to the file ``Documentation/arm64/booting.txt`` of the
90a546d25bSBenjamin Fair 	 * Linux kernel tree, Linux expects the physical address of the device
91a546d25bSBenjamin Fair 	 * tree blob (DTB) in x0, while x1-x3 are reserved for future use and
92a546d25bSBenjamin Fair 	 * must be 0.
93a546d25bSBenjamin Fair 	 */
94a546d25bSBenjamin Fair 	bl33_image_ep_info.args.arg0 = (u_register_t)K3_HW_CONFIG_BASE;
95a546d25bSBenjamin Fair 	bl33_image_ep_info.args.arg1 = 0U;
96a546d25bSBenjamin Fair 	bl33_image_ep_info.args.arg2 = 0U;
97a546d25bSBenjamin Fair 	bl33_image_ep_info.args.arg3 = 0U;
98a546d25bSBenjamin Fair #endif
991841c533SNishanth Menon }
1001841c533SNishanth Menon 
1011841c533SNishanth Menon void bl31_plat_arch_setup(void)
1021841c533SNishanth Menon {
103d323af9eSDaniel Boulby 	const mmap_region_t bl_regions[] = {
104d323af9eSDaniel Boulby 		MAP_REGION_FLAT(BL31_BASE, BL31_END - BL31_BASE,
105d323af9eSDaniel Boulby 				MT_MEMORY | MT_RW | MT_SECURE),
106d323af9eSDaniel Boulby 		MAP_REGION_FLAT(BL_CODE_BASE, BL_CODE_END - BL_CODE_BASE,
107d323af9eSDaniel Boulby 				MT_CODE | MT_SECURE),
108d323af9eSDaniel Boulby 		MAP_REGION_FLAT(BL_RO_DATA_BASE, BL_RO_DATA_END - BL_RO_DATA_END,
109d323af9eSDaniel Boulby 				MT_RO_DATA | MT_SECURE),
110d323af9eSDaniel Boulby 		{0}
111d323af9eSDaniel Boulby 	};
112d323af9eSDaniel Boulby 
113ef202857SAndrew F. Davis 	setup_page_tables(bl_regions, plat_k3_mmap);
114e67bfcf3SNishanth Menon 	enable_mmu_el3(0);
1151841c533SNishanth Menon }
1161841c533SNishanth Menon 
1171841c533SNishanth Menon void bl31_platform_setup(void)
1181841c533SNishanth Menon {
11974e8cf48SNishanth Menon 	k3_gic_driver_init(K3_GICD_BASE, K3_GICR_BASE);
12074e8cf48SNishanth Menon 	k3_gic_init();
121b5c2e1c4SAndrew F. Davis 
122b5c2e1c4SAndrew F. Davis 	ti_sci_init();
1231841c533SNishanth Menon }
1241841c533SNishanth Menon 
1251841c533SNishanth Menon void platform_mem_init(void)
1261841c533SNishanth Menon {
1271841c533SNishanth Menon 	/* Do nothing for now... */
1281841c533SNishanth Menon }
1291841c533SNishanth Menon 
130e9cb89cfSNishanth Menon unsigned int plat_get_syscnt_freq2(void)
131e9cb89cfSNishanth Menon {
132e9cb89cfSNishanth Menon 	return SYS_COUNTER_FREQ_IN_TICKS;
133e9cb89cfSNishanth Menon }
134e9cb89cfSNishanth Menon 
1351841c533SNishanth Menon /*
1361841c533SNishanth Menon  * Empty function to prevent the console from being uninitialized after BL33 is
1371841c533SNishanth Menon  * started and allow us to see messages from BL31.
1381841c533SNishanth Menon  */
1391841c533SNishanth Menon void bl31_plat_runtime_setup(void)
1401841c533SNishanth Menon {
1411841c533SNishanth Menon }
1421841c533SNishanth Menon 
1431841c533SNishanth Menon /*******************************************************************************
1441841c533SNishanth Menon  * Return a pointer to the 'entry_point_info' structure of the next image
1451841c533SNishanth Menon  * for the security state specified. BL3-3 corresponds to the non-secure
1461841c533SNishanth Menon  * image type while BL3-2 corresponds to the secure image type. A NULL
1471841c533SNishanth Menon  * pointer is returned if the image does not exist.
1481841c533SNishanth Menon  ******************************************************************************/
1491841c533SNishanth Menon entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
1501841c533SNishanth Menon {
151a546d25bSBenjamin Fair 	entry_point_info_t *next_image_info;
152a546d25bSBenjamin Fair 
153a546d25bSBenjamin Fair 	assert(sec_state_is_valid(type));
154a546d25bSBenjamin Fair 	next_image_info = (type == NON_SECURE) ? &bl33_image_ep_info :
155a546d25bSBenjamin Fair 						 &bl32_image_ep_info;
156a546d25bSBenjamin Fair 	/*
157a546d25bSBenjamin Fair 	 * None of the images on the ARM development platforms can have 0x0
158a546d25bSBenjamin Fair 	 * as the entrypoint
159a546d25bSBenjamin Fair 	 */
160a546d25bSBenjamin Fair 	if (next_image_info->pc)
161a546d25bSBenjamin Fair 		return next_image_info;
162a546d25bSBenjamin Fair 
163a546d25bSBenjamin Fair 	NOTICE("Requested nonexistent image\n");
1641841c533SNishanth Menon 	return NULL;
1651841c533SNishanth Menon }
166