18d675153SNishanth Menon /* 279fadd8fSDeepika Bhavnani * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. 38d675153SNishanth Menon * 48d675153SNishanth Menon * SPDX-License-Identifier: BSD-3-Clause 58d675153SNishanth Menon */ 68d675153SNishanth Menon 71083b2b3SAntonio Nino Diaz #ifndef BOARD_DEF_H 81083b2b3SAntonio Nino Diaz #define BOARD_DEF_H 91083b2b3SAntonio Nino Diaz 1009d40e0eSAntonio Nino Diaz #include <lib/utils_def.h> 118d675153SNishanth Menon 128d675153SNishanth Menon /* The ports must be in order and contiguous */ 1379fadd8fSDeepika Bhavnani #define K3_CLUSTER0_CORE_COUNT U(2) 1479fadd8fSDeepika Bhavnani #define K3_CLUSTER1_CORE_COUNT U(2) 15*e9868458SAndrew Davis #define K3_CLUSTER2_CORE_COUNT U(0) 16*e9868458SAndrew Davis #define K3_CLUSTER3_CORE_COUNT U(0) 178d675153SNishanth Menon 18f5872a00SNishanth Menon #define PLAT_PROC_START_ID U(32) 19f5872a00SNishanth Menon #define PLAT_PROC_DEVICE_START_ID U(202) 20f5872a00SNishanth Menon #define PLAT_CLUSTER_DEVICE_START_ID U(198) 210bdef264SAndrew Davis #define PLAT_BOARD_DEVICE_ID U(157) 22df83b034SAndrew F. Davis 231083b2b3SAntonio Nino Diaz #endif /* BOARD_DEF_H */ 24