1 /* 2 * Copyright (c) 2023-2024, STMicroelectronics - All Rights Reserved 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 9 #include <lib/xlat_tables/xlat_tables_v2.h> 10 11 #include <platform_def.h> 12 13 #define BKPR_BOOT_MODE 96U 14 15 #define MAP_SYSRAM MAP_REGION_FLAT(STM32MP_SYSRAM_BASE, \ 16 STM32MP_SYSRAM_SIZE, \ 17 MT_MEMORY | \ 18 MT_RW | \ 19 MT_SECURE | \ 20 MT_EXECUTE_NEVER) 21 22 #define MAP_DEVICE MAP_REGION_FLAT(STM32MP_DEVICE_BASE, \ 23 STM32MP_DEVICE_SIZE, \ 24 MT_DEVICE | \ 25 MT_RW | \ 26 MT_SECURE | \ 27 MT_EXECUTE_NEVER) 28 29 #if defined(IMAGE_BL2) 30 static const mmap_region_t stm32mp2_mmap[] = { 31 MAP_SYSRAM, 32 MAP_DEVICE, 33 {0} 34 }; 35 #endif 36 37 void configure_mmu(void) 38 { 39 mmap_add(stm32mp2_mmap); 40 init_xlat_tables(); 41 42 enable_mmu_el3(0); 43 } 44 45 uintptr_t stm32_get_gpio_bank_base(unsigned int bank) 46 { 47 if (bank == GPIO_BANK_Z) { 48 return GPIOZ_BASE; 49 } 50 51 assert(bank <= GPIO_BANK_K); 52 53 return GPIOA_BASE + (bank * GPIO_BANK_OFFSET); 54 } 55 56 uint32_t stm32_get_gpio_bank_offset(unsigned int bank) 57 { 58 if (bank == GPIO_BANK_Z) { 59 return 0; 60 } 61 62 assert(bank <= GPIO_BANK_K); 63 64 return bank * GPIO_BANK_OFFSET; 65 } 66 67 unsigned long stm32_get_gpio_bank_clock(unsigned int bank) 68 { 69 if (bank == GPIO_BANK_Z) { 70 return CK_BUS_GPIOZ; 71 } 72 73 assert(bank <= GPIO_BANK_K); 74 75 return CK_BUS_GPIOA + (bank - GPIO_BANK_A); 76 } 77 78 uint32_t stm32mp_get_chip_version(void) 79 { 80 static uint32_t rev; 81 82 if (rev != 0U) { 83 return rev; 84 } 85 86 if (stm32_get_otp_value(REVISION_OTP, &rev) != 0) { 87 panic(); 88 } 89 90 return rev; 91 } 92 93 uint32_t stm32mp_get_chip_dev_id(void) 94 { 95 return stm32mp_syscfg_get_chip_dev_id(); 96 } 97 98 static uint32_t get_part_number(void) 99 { 100 static uint32_t part_number; 101 102 if (part_number != 0U) { 103 return part_number; 104 } 105 106 if (stm32_get_otp_value(PART_NUMBER_OTP, &part_number) != 0) { 107 panic(); 108 } 109 110 return part_number; 111 } 112 113 static uint32_t get_cpu_package(void) 114 { 115 static uint32_t package = UINT32_MAX; 116 117 if (package == UINT32_MAX) { 118 if (stm32_get_otp_value(PACKAGE_OTP, &package) != 0) { 119 panic(); 120 } 121 } 122 123 return (package & PACKAGE_OTP_PKG_MASK) >> PACKAGE_OTP_PKG_SHIFT; 124 } 125 126 void stm32mp_get_soc_name(char name[STM32_SOC_NAME_SIZE]) 127 { 128 char *cpu_s, *cpu_r, *pkg; 129 130 /* MPUs Part Numbers */ 131 switch (get_part_number()) { 132 case STM32MP251A_PART_NB: 133 cpu_s = "251A"; 134 break; 135 case STM32MP251C_PART_NB: 136 cpu_s = "251C"; 137 break; 138 case STM32MP251D_PART_NB: 139 cpu_s = "251D"; 140 break; 141 case STM32MP251F_PART_NB: 142 cpu_s = "251F"; 143 break; 144 case STM32MP253A_PART_NB: 145 cpu_s = "253A"; 146 break; 147 case STM32MP253C_PART_NB: 148 cpu_s = "253C"; 149 break; 150 case STM32MP253D_PART_NB: 151 cpu_s = "253D"; 152 break; 153 case STM32MP253F_PART_NB: 154 cpu_s = "253F"; 155 break; 156 case STM32MP255A_PART_NB: 157 cpu_s = "255A"; 158 break; 159 case STM32MP255C_PART_NB: 160 cpu_s = "255C"; 161 break; 162 case STM32MP255D_PART_NB: 163 cpu_s = "255D"; 164 break; 165 case STM32MP255F_PART_NB: 166 cpu_s = "255F"; 167 break; 168 case STM32MP257A_PART_NB: 169 cpu_s = "257A"; 170 break; 171 case STM32MP257C_PART_NB: 172 cpu_s = "257C"; 173 break; 174 case STM32MP257D_PART_NB: 175 cpu_s = "257D"; 176 break; 177 case STM32MP257F_PART_NB: 178 cpu_s = "257F"; 179 break; 180 default: 181 cpu_s = "????"; 182 break; 183 } 184 185 /* Package */ 186 switch (get_cpu_package()) { 187 case STM32MP25_PKG_CUSTOM: 188 pkg = "XX"; 189 break; 190 case STM32MP25_PKG_AL_VFBGA361: 191 pkg = "AL"; 192 break; 193 case STM32MP25_PKG_AK_VFBGA424: 194 pkg = "AK"; 195 break; 196 case STM32MP25_PKG_AI_TFBGA436: 197 pkg = "AI"; 198 break; 199 default: 200 pkg = "??"; 201 break; 202 } 203 204 /* REVISION */ 205 switch (stm32mp_get_chip_version()) { 206 case STM32MP2_REV_A: 207 cpu_r = "A"; 208 break; 209 case STM32MP2_REV_B: 210 cpu_r = "B"; 211 break; 212 case STM32MP2_REV_X: 213 cpu_r = "X"; 214 break; 215 case STM32MP2_REV_Y: 216 cpu_r = "Y"; 217 break; 218 case STM32MP2_REV_Z: 219 cpu_r = "Z"; 220 break; 221 default: 222 cpu_r = "?"; 223 break; 224 } 225 226 snprintf(name, STM32_SOC_NAME_SIZE, 227 "STM32MP%s%s Rev.%s", cpu_s, pkg, cpu_r); 228 } 229 230 void stm32mp_print_cpuinfo(void) 231 { 232 char name[STM32_SOC_NAME_SIZE]; 233 234 stm32mp_get_soc_name(name); 235 NOTICE("CPU: %s\n", name); 236 } 237 238 void stm32mp_print_boardinfo(void) 239 { 240 uint32_t board_id = 0U; 241 242 if (stm32_get_otp_value(BOARD_ID_OTP, &board_id) != 0) { 243 return; 244 } 245 246 if (board_id != 0U) { 247 stm32_display_board_info(board_id); 248 } 249 } 250 251 uintptr_t stm32_get_bkpr_boot_mode_addr(void) 252 { 253 return tamp_bkpr(BKPR_BOOT_MODE); 254 } 255