1db77f8bfSYann Gautier /* 2db77f8bfSYann Gautier * Copyright (c) 2023-2024, STMicroelectronics - All Rights Reserved 3db77f8bfSYann Gautier * 4db77f8bfSYann Gautier * SPDX-License-Identifier: BSD-3-Clause 5db77f8bfSYann Gautier */ 6db77f8bfSYann Gautier 7db77f8bfSYann Gautier #include <assert.h> 8db77f8bfSYann Gautier 9db77f8bfSYann Gautier #include <lib/xlat_tables/xlat_tables_v2.h> 10db77f8bfSYann Gautier 11db77f8bfSYann Gautier #include <platform_def.h> 12db77f8bfSYann Gautier 13db77f8bfSYann Gautier #define BKPR_BOOT_MODE 96U 14db77f8bfSYann Gautier 15db77f8bfSYann Gautier #define MAP_SYSRAM MAP_REGION_FLAT(STM32MP_SYSRAM_BASE, \ 16db77f8bfSYann Gautier STM32MP_SYSRAM_SIZE, \ 17db77f8bfSYann Gautier MT_MEMORY | \ 18db77f8bfSYann Gautier MT_RW | \ 19db77f8bfSYann Gautier MT_SECURE | \ 20db77f8bfSYann Gautier MT_EXECUTE_NEVER) 21db77f8bfSYann Gautier 22db77f8bfSYann Gautier #define MAP_DEVICE MAP_REGION_FLAT(STM32MP_DEVICE_BASE, \ 23db77f8bfSYann Gautier STM32MP_DEVICE_SIZE, \ 24db77f8bfSYann Gautier MT_DEVICE | \ 25db77f8bfSYann Gautier MT_RW | \ 26db77f8bfSYann Gautier MT_SECURE | \ 27db77f8bfSYann Gautier MT_EXECUTE_NEVER) 28db77f8bfSYann Gautier 29db77f8bfSYann Gautier #if defined(IMAGE_BL2) 30db77f8bfSYann Gautier static const mmap_region_t stm32mp2_mmap[] = { 31db77f8bfSYann Gautier MAP_SYSRAM, 32db77f8bfSYann Gautier MAP_DEVICE, 33db77f8bfSYann Gautier {0} 34db77f8bfSYann Gautier }; 35db77f8bfSYann Gautier #endif 36db77f8bfSYann Gautier 37db77f8bfSYann Gautier void configure_mmu(void) 38db77f8bfSYann Gautier { 39db77f8bfSYann Gautier mmap_add(stm32mp2_mmap); 40db77f8bfSYann Gautier init_xlat_tables(); 41db77f8bfSYann Gautier 42db77f8bfSYann Gautier enable_mmu_el3(0); 43db77f8bfSYann Gautier } 44db77f8bfSYann Gautier 45db77f8bfSYann Gautier uintptr_t stm32_get_gpio_bank_base(unsigned int bank) 46db77f8bfSYann Gautier { 47db77f8bfSYann Gautier if (bank == GPIO_BANK_Z) { 48db77f8bfSYann Gautier return GPIOZ_BASE; 49db77f8bfSYann Gautier } 50db77f8bfSYann Gautier 51db77f8bfSYann Gautier assert(bank <= GPIO_BANK_K); 52db77f8bfSYann Gautier 53db77f8bfSYann Gautier return GPIOA_BASE + (bank * GPIO_BANK_OFFSET); 54db77f8bfSYann Gautier } 55db77f8bfSYann Gautier 56db77f8bfSYann Gautier uint32_t stm32_get_gpio_bank_offset(unsigned int bank) 57db77f8bfSYann Gautier { 58db77f8bfSYann Gautier if (bank == GPIO_BANK_Z) { 59db77f8bfSYann Gautier return 0; 60db77f8bfSYann Gautier } 61db77f8bfSYann Gautier 62db77f8bfSYann Gautier assert(bank <= GPIO_BANK_K); 63db77f8bfSYann Gautier 64db77f8bfSYann Gautier return bank * GPIO_BANK_OFFSET; 65db77f8bfSYann Gautier } 66db77f8bfSYann Gautier 67db77f8bfSYann Gautier unsigned long stm32_get_gpio_bank_clock(unsigned int bank) 68db77f8bfSYann Gautier { 69db77f8bfSYann Gautier if (bank == GPIO_BANK_Z) { 70db77f8bfSYann Gautier return CK_BUS_GPIOZ; 71db77f8bfSYann Gautier } 72db77f8bfSYann Gautier 73db77f8bfSYann Gautier assert(bank <= GPIO_BANK_K); 74db77f8bfSYann Gautier 75db77f8bfSYann Gautier return CK_BUS_GPIOA + (bank - GPIO_BANK_A); 76db77f8bfSYann Gautier } 77db77f8bfSYann Gautier 78381b2a6bSYann Gautier uint32_t stm32mp_get_chip_version(void) 79381b2a6bSYann Gautier { 80381b2a6bSYann Gautier static uint32_t rev; 81381b2a6bSYann Gautier 82381b2a6bSYann Gautier if (rev != 0U) { 83381b2a6bSYann Gautier return rev; 84381b2a6bSYann Gautier } 85381b2a6bSYann Gautier 86381b2a6bSYann Gautier if (stm32_get_otp_value(REVISION_OTP, &rev) != 0) { 87381b2a6bSYann Gautier panic(); 88381b2a6bSYann Gautier } 89381b2a6bSYann Gautier 90381b2a6bSYann Gautier return rev; 91381b2a6bSYann Gautier } 92381b2a6bSYann Gautier 93381b2a6bSYann Gautier uint32_t stm32mp_get_chip_dev_id(void) 94381b2a6bSYann Gautier { 95381b2a6bSYann Gautier return stm32mp_syscfg_get_chip_dev_id(); 96381b2a6bSYann Gautier } 97381b2a6bSYann Gautier 98381b2a6bSYann Gautier static uint32_t get_part_number(void) 99381b2a6bSYann Gautier { 100381b2a6bSYann Gautier static uint32_t part_number; 101381b2a6bSYann Gautier 102381b2a6bSYann Gautier if (part_number != 0U) { 103381b2a6bSYann Gautier return part_number; 104381b2a6bSYann Gautier } 105381b2a6bSYann Gautier 106381b2a6bSYann Gautier if (stm32_get_otp_value(PART_NUMBER_OTP, &part_number) != 0) { 107381b2a6bSYann Gautier panic(); 108381b2a6bSYann Gautier } 109381b2a6bSYann Gautier 110381b2a6bSYann Gautier return part_number; 111381b2a6bSYann Gautier } 112381b2a6bSYann Gautier 113381b2a6bSYann Gautier static uint32_t get_cpu_package(void) 114381b2a6bSYann Gautier { 115381b2a6bSYann Gautier static uint32_t package = UINT32_MAX; 116381b2a6bSYann Gautier 117381b2a6bSYann Gautier if (package == UINT32_MAX) { 118381b2a6bSYann Gautier if (stm32_get_otp_value(PACKAGE_OTP, &package) != 0) { 119381b2a6bSYann Gautier panic(); 120381b2a6bSYann Gautier } 121381b2a6bSYann Gautier } 122381b2a6bSYann Gautier 123381b2a6bSYann Gautier return (package & PACKAGE_OTP_PKG_MASK) >> PACKAGE_OTP_PKG_SHIFT; 124381b2a6bSYann Gautier } 125381b2a6bSYann Gautier 126381b2a6bSYann Gautier void stm32mp_get_soc_name(char name[STM32_SOC_NAME_SIZE]) 127381b2a6bSYann Gautier { 128381b2a6bSYann Gautier char *cpu_s, *cpu_r, *pkg; 129381b2a6bSYann Gautier 130381b2a6bSYann Gautier /* MPUs Part Numbers */ 131381b2a6bSYann Gautier switch (get_part_number()) { 132381b2a6bSYann Gautier case STM32MP251A_PART_NB: 133381b2a6bSYann Gautier cpu_s = "251A"; 134381b2a6bSYann Gautier break; 135381b2a6bSYann Gautier case STM32MP251C_PART_NB: 136381b2a6bSYann Gautier cpu_s = "251C"; 137381b2a6bSYann Gautier break; 138381b2a6bSYann Gautier case STM32MP251D_PART_NB: 139381b2a6bSYann Gautier cpu_s = "251D"; 140381b2a6bSYann Gautier break; 141381b2a6bSYann Gautier case STM32MP251F_PART_NB: 142381b2a6bSYann Gautier cpu_s = "251F"; 143381b2a6bSYann Gautier break; 144381b2a6bSYann Gautier case STM32MP253A_PART_NB: 145381b2a6bSYann Gautier cpu_s = "253A"; 146381b2a6bSYann Gautier break; 147381b2a6bSYann Gautier case STM32MP253C_PART_NB: 148381b2a6bSYann Gautier cpu_s = "253C"; 149381b2a6bSYann Gautier break; 150381b2a6bSYann Gautier case STM32MP253D_PART_NB: 151381b2a6bSYann Gautier cpu_s = "253D"; 152381b2a6bSYann Gautier break; 153381b2a6bSYann Gautier case STM32MP253F_PART_NB: 154381b2a6bSYann Gautier cpu_s = "253F"; 155381b2a6bSYann Gautier break; 156381b2a6bSYann Gautier case STM32MP255A_PART_NB: 157381b2a6bSYann Gautier cpu_s = "255A"; 158381b2a6bSYann Gautier break; 159381b2a6bSYann Gautier case STM32MP255C_PART_NB: 160381b2a6bSYann Gautier cpu_s = "255C"; 161381b2a6bSYann Gautier break; 162381b2a6bSYann Gautier case STM32MP255D_PART_NB: 163381b2a6bSYann Gautier cpu_s = "255D"; 164381b2a6bSYann Gautier break; 165381b2a6bSYann Gautier case STM32MP255F_PART_NB: 166381b2a6bSYann Gautier cpu_s = "255F"; 167381b2a6bSYann Gautier break; 168381b2a6bSYann Gautier case STM32MP257A_PART_NB: 169381b2a6bSYann Gautier cpu_s = "257A"; 170381b2a6bSYann Gautier break; 171381b2a6bSYann Gautier case STM32MP257C_PART_NB: 172381b2a6bSYann Gautier cpu_s = "257C"; 173381b2a6bSYann Gautier break; 174381b2a6bSYann Gautier case STM32MP257D_PART_NB: 175381b2a6bSYann Gautier cpu_s = "257D"; 176381b2a6bSYann Gautier break; 177381b2a6bSYann Gautier case STM32MP257F_PART_NB: 178381b2a6bSYann Gautier cpu_s = "257F"; 179381b2a6bSYann Gautier break; 180381b2a6bSYann Gautier default: 181381b2a6bSYann Gautier cpu_s = "????"; 182381b2a6bSYann Gautier break; 183381b2a6bSYann Gautier } 184381b2a6bSYann Gautier 185381b2a6bSYann Gautier /* Package */ 186381b2a6bSYann Gautier switch (get_cpu_package()) { 187381b2a6bSYann Gautier case STM32MP25_PKG_CUSTOM: 188381b2a6bSYann Gautier pkg = "XX"; 189381b2a6bSYann Gautier break; 190381b2a6bSYann Gautier case STM32MP25_PKG_AL_VFBGA361: 191381b2a6bSYann Gautier pkg = "AL"; 192381b2a6bSYann Gautier break; 193381b2a6bSYann Gautier case STM32MP25_PKG_AK_VFBGA424: 194381b2a6bSYann Gautier pkg = "AK"; 195381b2a6bSYann Gautier break; 196381b2a6bSYann Gautier case STM32MP25_PKG_AI_TFBGA436: 197381b2a6bSYann Gautier pkg = "AI"; 198381b2a6bSYann Gautier break; 199381b2a6bSYann Gautier default: 200381b2a6bSYann Gautier pkg = "??"; 201381b2a6bSYann Gautier break; 202381b2a6bSYann Gautier } 203381b2a6bSYann Gautier 204381b2a6bSYann Gautier /* REVISION */ 205381b2a6bSYann Gautier switch (stm32mp_get_chip_version()) { 206381b2a6bSYann Gautier case STM32MP2_REV_A: 207381b2a6bSYann Gautier cpu_r = "A"; 208381b2a6bSYann Gautier break; 209381b2a6bSYann Gautier case STM32MP2_REV_B: 210381b2a6bSYann Gautier cpu_r = "B"; 211381b2a6bSYann Gautier break; 212381b2a6bSYann Gautier case STM32MP2_REV_X: 213381b2a6bSYann Gautier cpu_r = "X"; 214381b2a6bSYann Gautier break; 215381b2a6bSYann Gautier case STM32MP2_REV_Y: 216381b2a6bSYann Gautier cpu_r = "Y"; 217381b2a6bSYann Gautier break; 218381b2a6bSYann Gautier case STM32MP2_REV_Z: 219381b2a6bSYann Gautier cpu_r = "Z"; 220381b2a6bSYann Gautier break; 221381b2a6bSYann Gautier default: 222381b2a6bSYann Gautier cpu_r = "?"; 223381b2a6bSYann Gautier break; 224381b2a6bSYann Gautier } 225381b2a6bSYann Gautier 226381b2a6bSYann Gautier snprintf(name, STM32_SOC_NAME_SIZE, 227381b2a6bSYann Gautier "STM32MP%s%s Rev.%s", cpu_s, pkg, cpu_r); 228381b2a6bSYann Gautier } 229381b2a6bSYann Gautier 230381b2a6bSYann Gautier void stm32mp_print_cpuinfo(void) 231381b2a6bSYann Gautier { 232381b2a6bSYann Gautier char name[STM32_SOC_NAME_SIZE]; 233381b2a6bSYann Gautier 234381b2a6bSYann Gautier stm32mp_get_soc_name(name); 235381b2a6bSYann Gautier NOTICE("CPU: %s\n", name); 236381b2a6bSYann Gautier } 237381b2a6bSYann Gautier 238*cdaced36SYann Gautier void stm32mp_print_boardinfo(void) 239*cdaced36SYann Gautier { 240*cdaced36SYann Gautier uint32_t board_id = 0U; 241*cdaced36SYann Gautier 242*cdaced36SYann Gautier if (stm32_get_otp_value(BOARD_ID_OTP, &board_id) != 0) { 243*cdaced36SYann Gautier return; 244*cdaced36SYann Gautier } 245*cdaced36SYann Gautier 246*cdaced36SYann Gautier if (board_id != 0U) { 247*cdaced36SYann Gautier stm32_display_board_info(board_id); 248*cdaced36SYann Gautier } 249*cdaced36SYann Gautier } 250*cdaced36SYann Gautier 251db77f8bfSYann Gautier uintptr_t stm32_get_bkpr_boot_mode_addr(void) 252db77f8bfSYann Gautier { 253db77f8bfSYann Gautier return tamp_bkpr(BKPR_BOOT_MODE); 254db77f8bfSYann Gautier } 255