xref: /rk3399_ARM-atf/plat/st/stm32mp2/platform.mk (revision 7f152ea6856c7780424ec3e92b181d805a314f43)
1#
2# Copyright (c) 2023-2024, STMicroelectronics - All Rights Reserved
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7# Extra partitions used to find FIP, contains:
8# metadata (2) and fsbl-m (2) and the FIP partitions (default is 2).
9STM32_EXTRA_PARTS		:=	6
10
11include plat/st/common/common.mk
12
13CRASH_REPORTING			:=	1
14ENABLE_PIE			:=	1
15PROGRAMMABLE_RESET_ADDRESS	:=	1
16BL2_IN_XIP_MEM			:=	1
17
18# Default Device tree
19DTB_FILE_NAME			?=	stm32mp257f-ev1.dtb
20
21STM32MP25			:=	1
22
23# STM32 image header version v2.2
24STM32_HEADER_VERSION_MAJOR	:=	2
25STM32_HEADER_VERSION_MINOR	:=	2
26
27# Set load address for serial boot devices
28DWL_BUFFER_BASE 		?=	0x87000000
29
30# DDR types
31STM32MP_DDR3_TYPE		?=	0
32STM32MP_DDR4_TYPE		?=	0
33STM32MP_LPDDR4_TYPE		?=	0
34ifeq (${STM32MP_DDR3_TYPE},1)
35DDR_TYPE			:=	ddr3
36endif
37ifeq (${STM32MP_DDR4_TYPE},1)
38DDR_TYPE			:=	ddr4
39endif
40ifeq (${STM32MP_LPDDR4_TYPE},1)
41DDR_TYPE			:=	lpddr4
42endif
43
44# DDR features
45STM32MP_DDR_FIP_IO_STORAGE	:=	1
46
47# Device tree
48BL2_DTSI			:=	stm32mp25-bl2.dtsi
49FDT_SOURCES			:=	$(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl2.dts,$(DTB_FILE_NAME)))
50
51# Macros and rules to build TF binary
52STM32_TF_STM32			:=	$(addprefix ${BUILD_PLAT}/tf-a-, $(patsubst %.dtb,%.stm32,$(DTB_FILE_NAME)))
53STM32_LD_FILE			:=	plat/st/stm32mp2/${ARCH}/stm32mp2.ld.S
54STM32_BINARY_MAPPING		:=	plat/st/stm32mp2/${ARCH}/stm32mp2.S
55
56STM32MP_FW_CONFIG_NAME		:=	$(patsubst %.dtb,%-fw-config.dtb,$(DTB_FILE_NAME))
57STM32MP_FW_CONFIG		:=	${BUILD_PLAT}/fdts/$(STM32MP_FW_CONFIG_NAME)
58ifeq (${STM32MP_DDR_FIP_IO_STORAGE},1)
59STM32MP_DDR_FW_PATH		?=	drivers/st/ddr/phy/firmware/bin/stm32mp2
60STM32MP_DDR_FW_NAME		:=	${DDR_TYPE}_pmu_train.bin
61STM32MP_DDR_FW			:=	${STM32MP_DDR_FW_PATH}/${STM32MP_DDR_FW_NAME}
62endif
63FDT_SOURCES			+=	$(addprefix fdts/, $(patsubst %.dtb,%.dts,$(STM32MP_FW_CONFIG_NAME)))
64# Add the FW_CONFIG to FIP and specify the same to certtool
65$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_FW_CONFIG},--fw-config))
66ifeq (${STM32MP_DDR_FIP_IO_STORAGE},1)
67# Add the FW_DDR to FIP and specify the same to certtool
68$(eval $(call TOOL_ADD_IMG,STM32MP_DDR_FW,--ddr-fw))
69endif
70
71# Enable flags for C files
72$(eval $(call assert_booleans,\
73	$(sort \
74		STM32MP_DDR_FIP_IO_STORAGE \
75		STM32MP_DDR3_TYPE \
76		STM32MP_DDR4_TYPE \
77		STM32MP_LPDDR4_TYPE \
78		STM32MP25 \
79)))
80
81$(eval $(call assert_numerics,\
82	$(sort \
83		PLAT_PARTITION_MAX_ENTRIES \
84		STM32_HEADER_VERSION_MAJOR \
85		STM32_TF_A_COPIES \
86)))
87
88$(eval $(call add_defines,\
89	$(sort \
90		DWL_BUFFER_BASE \
91		PLAT_DEF_FIP_UUID \
92		PLAT_PARTITION_MAX_ENTRIES \
93		PLAT_TBBR_IMG_DEF \
94		STM32_TF_A_COPIES \
95		STM32MP_DDR_FIP_IO_STORAGE \
96		STM32MP_DDR3_TYPE \
97		STM32MP_DDR4_TYPE \
98		STM32MP_LPDDR4_TYPE \
99		STM32MP25 \
100)))
101
102# STM32MP2x is based on Cortex-A35, which is Armv8.0, and does not support BTI
103# Disable mbranch-protection to avoid adding useless code
104TF_CFLAGS			+=	-mbranch-protection=none
105
106# Include paths and source files
107PLAT_INCLUDES			+=	-Iplat/st/stm32mp2/include/
108
109PLAT_BL_COMMON_SOURCES		+=	lib/cpus/${ARCH}/cortex_a35.S
110PLAT_BL_COMMON_SOURCES		+=	drivers/st/uart/${ARCH}/stm32_console.S
111PLAT_BL_COMMON_SOURCES		+=	plat/st/stm32mp2/${ARCH}/stm32mp2_helper.S
112
113PLAT_BL_COMMON_SOURCES		+=	drivers/st/pmic/stm32mp_pmic2.c				\
114					drivers/st/pmic/stpmic2.c				\
115
116PLAT_BL_COMMON_SOURCES		+=	drivers/st/i2c/stm32_i2c.c
117
118PLAT_BL_COMMON_SOURCES		+=	plat/st/stm32mp2/stm32mp2_private.c
119
120PLAT_BL_COMMON_SOURCES		+=	drivers/st/bsec/bsec3.c					\
121					drivers/st/reset/stm32mp2_reset.c			\
122					plat/st/stm32mp2/stm32mp2_syscfg.c
123
124PLAT_BL_COMMON_SOURCES		+=	drivers/st/clk/clk-stm32-core.c				\
125					drivers/st/clk/clk-stm32mp2.c
126
127BL2_SOURCES			+=	plat/st/stm32mp2/plat_bl2_mem_params_desc.c
128
129BL2_SOURCES			+=	plat/st/stm32mp2/bl2_plat_setup.c
130
131ifneq ($(filter 1,${STM32MP_EMMC} ${STM32MP_SDMMC}),)
132BL2_SOURCES			+=	drivers/st/mmc/stm32_sdmmc2.c
133endif
134
135ifeq (${STM32MP_USB_PROGRAMMER},1)
136BL2_SOURCES			+=	plat/st/stm32mp2/stm32mp2_usb_dfu.c
137endif
138
139BL2_SOURCES			+=	drivers/st/ddr/stm32mp2_ddr_helpers.c
140
141# BL31 sources
142BL31_SOURCES			+=	${FDT_WRAPPERS_SOURCES}
143
144BL31_SOURCES			+=	plat/st/stm32mp2/bl31_plat_setup.c			\
145					plat/st/stm32mp2/stm32mp2_pm.c				\
146					plat/st/stm32mp2/stm32mp2_topology.c
147# Generic GIC v2
148include drivers/arm/gic/v2/gicv2.mk
149
150BL31_SOURCES			+=	${GICV2_SOURCES}					\
151					plat/common/plat_gicv2.c				\
152					plat/st/common/stm32mp_gic.c
153
154# Generic PSCI
155BL31_SOURCES			+=	plat/common/plat_psci_common.c
156
157# Compilation rules
158.PHONY: check_ddr_type
159.SUFFIXES:
160
161bl2: check_ddr_type
162
163check_ddr_type:
164	$(eval DDR_TYPE = $(shell echo $$(($(STM32MP_DDR3_TYPE) + \
165					   $(STM32MP_DDR4_TYPE) + \
166					   $(STM32MP_LPDDR4_TYPE)))))
167	@if [ ${DDR_TYPE} != 1 ]; then \
168		echo "One and only one DDR type must be defined"; \
169		false; \
170	fi
171
172include plat/st/common/common_rules.mk
173