135527fb4SYann Gautier# 2ac9abe7eSMaxime Méré# Copyright (c) 2023-2025, STMicroelectronics - All Rights Reserved 335527fb4SYann Gautier# 435527fb4SYann Gautier# SPDX-License-Identifier: BSD-3-Clause 535527fb4SYann Gautier# 635527fb4SYann Gautier 766b4c5c5SYann Gautier# Extra partitions used to find FIP, contains: 866b4c5c5SYann Gautier# metadata (2) and fsbl-m (2) and the FIP partitions (default is 2). 966b4c5c5SYann GautierSTM32_EXTRA_PARTS := 6 1066b4c5c5SYann Gautier 1135527fb4SYann Gautierinclude plat/st/common/common.mk 1235527fb4SYann Gautier 1335527fb4SYann GautierCRASH_REPORTING := 1 14ac9abe7eSMaxime Méré# Disable PIE by default. To re-enable it, uncomment next line. 15ac9abe7eSMaxime Méré#ENABLE_PIE := 1 1635527fb4SYann GautierPROGRAMMABLE_RESET_ADDRESS := 1 17ac9abe7eSMaxime Méréifeq ($(ENABLE_PIE),1) 18db77f8bfSYann GautierBL2_IN_XIP_MEM := 1 19ac9abe7eSMaxime Méréendif 2035527fb4SYann Gautier 21c900760dSYann GautierSTM32MP_BL33_EL1 ?= 1 22c900760dSYann Gautierifeq ($(STM32MP_BL33_EL1),1) 23c900760dSYann GautierINIT_UNUSED_NS_EL2 := 1 24c900760dSYann Gautierendif 25c900760dSYann Gautier 26128df965SYann Gautier# Disable features unsupported in ARMv8.0 27128df965SYann GautierENABLE_SPE_FOR_NS := 0 28128df965SYann GautierENABLE_SVE_FOR_NS := 0 29128df965SYann Gautier 3035527fb4SYann Gautier# Default Device tree 3135527fb4SYann GautierDTB_FILE_NAME ?= stm32mp257f-ev1.dtb 3235527fb4SYann Gautier 33*07759f2bSYann GautierSTM32MP21 ?= 0 34*07759f2bSYann GautierSTM32MP25 ?= 0 3535527fb4SYann Gautier 36*07759f2bSYann Gautierifneq ($(findstring stm32mp21,$(DTB_FILE_NAME)),) 37*07759f2bSYann GautierSTM32MP21 := 1 38*07759f2bSYann Gautierendif 39*07759f2bSYann Gautierifneq ($(findstring stm32mp25,$(DTB_FILE_NAME)),) 40*07759f2bSYann GautierSTM32MP25 := 1 41*07759f2bSYann Gautierendif 42*07759f2bSYann Gautierifneq ($(filter 1,$(STM32MP21) $(STM32MP25)), 1) 43*07759f2bSYann Gautier$(warning STM32MP21=$(STM32MP21)) 44*07759f2bSYann Gautier$(warning STM32MP25=$(STM32MP25)) 45*07759f2bSYann Gautier$(warning DTB_FILE_NAME=$(DTB_FILE_NAME)) 46*07759f2bSYann Gautier$(error Cannot enable 2 flags STM32MP2X) 47*07759f2bSYann Gautierendif 48*07759f2bSYann Gautier 49*07759f2bSYann Gautier# STM32 image header version v2.2 or v2.3 for STM32MP21 5035527fb4SYann GautierSTM32_HEADER_VERSION_MAJOR := 2 51*07759f2bSYann Gautierifeq ($(STM32MP21),1) 52*07759f2bSYann GautierSTM32_HEADER_VERSION_MINOR := 3 53*07759f2bSYann Gautierelse 5435527fb4SYann GautierSTM32_HEADER_VERSION_MINOR := 2 55*07759f2bSYann Gautierendif 5635527fb4SYann Gautier 572e905c06SYann Gautier# Set load address for serial boot devices 582e905c06SYann GautierDWL_BUFFER_BASE ?= 0x87000000 592e905c06SYann Gautier 60d07e9467SNicolas Le Bayon# DDR types 61d07e9467SNicolas Le BayonSTM32MP_DDR3_TYPE ?= 0 62d07e9467SNicolas Le BayonSTM32MP_DDR4_TYPE ?= 0 63d07e9467SNicolas Le BayonSTM32MP_LPDDR4_TYPE ?= 0 64d07e9467SNicolas Le Bayonifeq (${STM32MP_DDR3_TYPE},1) 65d07e9467SNicolas Le BayonDDR_TYPE := ddr3 66d07e9467SNicolas Le Bayonendif 67d07e9467SNicolas Le Bayonifeq (${STM32MP_DDR4_TYPE},1) 68d07e9467SNicolas Le BayonDDR_TYPE := ddr4 69d07e9467SNicolas Le Bayonendif 70d07e9467SNicolas Le Bayonifeq (${STM32MP_LPDDR4_TYPE},1) 71d07e9467SNicolas Le BayonDDR_TYPE := lpddr4 72d07e9467SNicolas Le Bayonendif 73d07e9467SNicolas Le Bayon 74ae84525fSMaxime Méré# DDR features 7579629b1aSNicolas Le BayonSTM32MP_DDR_DUAL_AXI_PORT := 1 76ae84525fSMaxime MéréSTM32MP_DDR_FIP_IO_STORAGE := 1 77ae84525fSMaxime Méré 78e5839ed7SYann Gautier# Device tree 79e5839ed7SYann GautierBL2_DTSI := stm32mp25-bl2.dtsi 80e5839ed7SYann GautierFDT_SOURCES := $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl2.dts,$(DTB_FILE_NAME))) 8127dd11dbSMaxime MéréBL31_DTSI := stm32mp25-bl31.dtsi 8227dd11dbSMaxime MéréFDT_SOURCES += $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl31.dts,$(DTB_FILE_NAME))) 83e5839ed7SYann Gautier 84e5839ed7SYann Gautier# Macros and rules to build TF binary 85e5839ed7SYann GautierSTM32_TF_STM32 := $(addprefix ${BUILD_PLAT}/tf-a-, $(patsubst %.dtb,%.stm32,$(DTB_FILE_NAME))) 86e5839ed7SYann GautierSTM32_LD_FILE := plat/st/stm32mp2/${ARCH}/stm32mp2.ld.S 87e5839ed7SYann GautierSTM32_BINARY_MAPPING := plat/st/stm32mp2/${ARCH}/stm32mp2.S 88e5839ed7SYann Gautier 895af9369cSYann GautierSTM32MP_FW_CONFIG_NAME := $(patsubst %.dtb,%-fw-config.dtb,$(DTB_FILE_NAME)) 905af9369cSYann GautierSTM32MP_FW_CONFIG := ${BUILD_PLAT}/fdts/$(STM32MP_FW_CONFIG_NAME) 9127dd11dbSMaxime MéréSTM32MP_SOC_FW_CONFIG := $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl31.dtb,$(DTB_FILE_NAME))) 92ae84525fSMaxime Méréifeq (${STM32MP_DDR_FIP_IO_STORAGE},1) 93ae84525fSMaxime MéréSTM32MP_DDR_FW_PATH ?= drivers/st/ddr/phy/firmware/bin/stm32mp2 94ae84525fSMaxime MéréSTM32MP_DDR_FW_NAME := ${DDR_TYPE}_pmu_train.bin 95ae84525fSMaxime MéréSTM32MP_DDR_FW := ${STM32MP_DDR_FW_PATH}/${STM32MP_DDR_FW_NAME} 96ae84525fSMaxime Méréendif 975af9369cSYann GautierFDT_SOURCES += $(addprefix fdts/, $(patsubst %.dtb,%.dts,$(STM32MP_FW_CONFIG_NAME))) 98f15f1c62SYann Gautier 995af9369cSYann Gautier# Add the FW_CONFIG to FIP and specify the same to certtool 1005af9369cSYann Gautier$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_FW_CONFIG},--fw-config)) 101f15f1c62SYann Gautier 10227dd11dbSMaxime Méré# Add the SOC_FW_CONFIG to FIP and specify the same to certtool 103f15f1c62SYann Gautier$(eval $(call TOOL_ADD_IMG_PAYLOAD,STM32MP_SOC_FW_CONFIG,$(STM32MP_SOC_FW_CONFIG),--soc-fw-config,$(patsubst %.dtb,%.dts,$(STM32MP_SOC_FW_CONFIG)))) 104f15f1c62SYann Gautier 105ae84525fSMaxime Méréifeq (${STM32MP_DDR_FIP_IO_STORAGE},1) 106ae84525fSMaxime Méré# Add the FW_DDR to FIP and specify the same to certtool 107ae84525fSMaxime Méré$(eval $(call TOOL_ADD_IMG,STM32MP_DDR_FW,--ddr-fw)) 108ae84525fSMaxime Méréendif 1095af9369cSYann Gautier 110d59dd96dSBoerge Struempfel# Ultratronik Specific Boards 111d59dd96dSBoerge Struempfelifeq ($(findstring ultra-fly,$(DTB_FILE_NAME)),ultra-fly) 112d59dd96dSBoerge StruempfelULTRA_FLY := 1 113d59dd96dSBoerge Struempfel$(eval $(call assert_booleans,\ 114d59dd96dSBoerge Struempfel $(sort \ 115d59dd96dSBoerge Struempfel ULTRA_FLY \ 116d59dd96dSBoerge Struempfel ))) 117d59dd96dSBoerge Struempfel$(eval $(call add_defines,\ 118d59dd96dSBoerge Struempfel $(sort \ 119d59dd96dSBoerge Struempfel ULTRA_FLY \ 120d59dd96dSBoerge Struempfel ))) 121d59dd96dSBoerge Struempfelendif 122d59dd96dSBoerge Struempfel 123db77f8bfSYann Gautier# Enable flags for C files 124db77f8bfSYann Gautier$(eval $(call assert_booleans,\ 125db77f8bfSYann Gautier $(sort \ 12679629b1aSNicolas Le Bayon STM32MP_DDR_DUAL_AXI_PORT \ 127ae84525fSMaxime Méré STM32MP_DDR_FIP_IO_STORAGE \ 128d07e9467SNicolas Le Bayon STM32MP_DDR3_TYPE \ 129d07e9467SNicolas Le Bayon STM32MP_DDR4_TYPE \ 130d07e9467SNicolas Le Bayon STM32MP_LPDDR4_TYPE \ 131*07759f2bSYann Gautier STM32MP21 \ 132db77f8bfSYann Gautier STM32MP25 \ 133c900760dSYann Gautier STM32MP_BL33_EL1 \ 134db77f8bfSYann Gautier))) 135db77f8bfSYann Gautier 136db77f8bfSYann Gautier$(eval $(call assert_numerics,\ 137db77f8bfSYann Gautier $(sort \ 138db77f8bfSYann Gautier PLAT_PARTITION_MAX_ENTRIES \ 139db77f8bfSYann Gautier STM32_HEADER_VERSION_MAJOR \ 140db77f8bfSYann Gautier STM32_TF_A_COPIES \ 141db77f8bfSYann Gautier))) 142db77f8bfSYann Gautier 1432e905c06SYann Gautier$(eval $(call add_defines,\ 1442e905c06SYann Gautier $(sort \ 1452e905c06SYann Gautier DWL_BUFFER_BASE \ 146ae84525fSMaxime Méré PLAT_DEF_FIP_UUID \ 147db77f8bfSYann Gautier PLAT_PARTITION_MAX_ENTRIES \ 148db77f8bfSYann Gautier PLAT_TBBR_IMG_DEF \ 149db77f8bfSYann Gautier STM32_TF_A_COPIES \ 15079629b1aSNicolas Le Bayon STM32MP_DDR_DUAL_AXI_PORT \ 151ae84525fSMaxime Méré STM32MP_DDR_FIP_IO_STORAGE \ 152d07e9467SNicolas Le Bayon STM32MP_DDR3_TYPE \ 153d07e9467SNicolas Le Bayon STM32MP_DDR4_TYPE \ 154d07e9467SNicolas Le Bayon STM32MP_LPDDR4_TYPE \ 155*07759f2bSYann Gautier STM32MP21 \ 156db77f8bfSYann Gautier STM32MP25 \ 157c900760dSYann Gautier STM32MP_BL33_EL1 \ 1582e905c06SYann Gautier))) 1592e905c06SYann Gautier 16035527fb4SYann Gautier# STM32MP2x is based on Cortex-A35, which is Armv8.0, and does not support BTI 16135527fb4SYann Gautier# Disable mbranch-protection to avoid adding useless code 16235527fb4SYann GautierTF_CFLAGS += -mbranch-protection=none 16335527fb4SYann Gautier 16435527fb4SYann Gautier# Include paths and source files 16535527fb4SYann GautierPLAT_INCLUDES += -Iplat/st/stm32mp2/include/ 16679629b1aSNicolas Le BayonPLAT_INCLUDES += -Idrivers/st/ddr/phy/phyinit/include/ 16779629b1aSNicolas Le BayonPLAT_INCLUDES += -Idrivers/st/ddr/phy/firmware/include/ 16835527fb4SYann Gautier 16935527fb4SYann GautierPLAT_BL_COMMON_SOURCES += lib/cpus/${ARCH}/cortex_a35.S 17087a940e0SYann GautierPLAT_BL_COMMON_SOURCES += drivers/st/uart/${ARCH}/stm32_console.S 17135527fb4SYann GautierPLAT_BL_COMMON_SOURCES += plat/st/stm32mp2/${ARCH}/stm32mp2_helper.S 17235527fb4SYann Gautier 173817f42f0SPascal PailletPLAT_BL_COMMON_SOURCES += drivers/st/pmic/stm32mp_pmic2.c \ 174817f42f0SPascal Paillet drivers/st/pmic/stpmic2.c \ 175817f42f0SPascal Paillet 176817f42f0SPascal PailletPLAT_BL_COMMON_SOURCES += drivers/st/i2c/stm32_i2c.c 177817f42f0SPascal Paillet 178db77f8bfSYann GautierPLAT_BL_COMMON_SOURCES += plat/st/stm32mp2/stm32mp2_private.c 179db77f8bfSYann Gautier 180f829d7dfSGabriel FernandezPLAT_BL_COMMON_SOURCES += drivers/st/bsec/bsec3.c \ 181154e6e62SYann Gautier drivers/st/reset/stm32mp2_reset.c \ 182154e6e62SYann Gautier plat/st/stm32mp2/stm32mp2_syscfg.c 183197ac780SYann Gautier 184615f31feSGabriel FernandezPLAT_BL_COMMON_SOURCES += drivers/st/clk/clk-stm32-core.c \ 185615f31feSGabriel Fernandez drivers/st/clk/clk-stm32mp2.c 186615f31feSGabriel Fernandez 18735527fb4SYann GautierBL2_SOURCES += plat/st/stm32mp2/plat_bl2_mem_params_desc.c 188db77f8bfSYann Gautier 189e2d6e5e2SPascal PailletBL2_SOURCES += plat/st/stm32mp2/bl2_plat_setup.c \ 190e2d6e5e2SPascal Paillet plat/st/stm32mp2/plat_ddr.c 19135527fb4SYann Gautier 192db77f8bfSYann Gautierifneq ($(filter 1,${STM32MP_EMMC} ${STM32MP_SDMMC}),) 193db77f8bfSYann GautierBL2_SOURCES += drivers/st/mmc/stm32_sdmmc2.c 194db77f8bfSYann Gautierendif 195db77f8bfSYann Gautier 1962e905c06SYann Gautierifeq (${STM32MP_USB_PROGRAMMER},1) 1972e905c06SYann GautierBL2_SOURCES += plat/st/stm32mp2/stm32mp2_usb_dfu.c 1982e905c06SYann Gautierendif 1992e905c06SYann Gautier 20079629b1aSNicolas Le BayonBL2_SOURCES += drivers/st/ddr/stm32mp2_ddr.c \ 20179629b1aSNicolas Le Bayon drivers/st/ddr/stm32mp2_ddr_helpers.c \ 20279629b1aSNicolas Le Bayon drivers/st/ddr/stm32mp2_ram.c 20379629b1aSNicolas Le Bayon 20479629b1aSNicolas Le BayonBL2_SOURCES += drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_c_initphyconfig.c \ 20579629b1aSNicolas Le Bayon drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_calcmb.c \ 20679629b1aSNicolas Le Bayon drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_i_loadpieimage.c \ 20779629b1aSNicolas Le Bayon drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_initstruct.c \ 20879629b1aSNicolas Le Bayon drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_isdbytedisabled.c \ 20979629b1aSNicolas Le Bayon drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_loadpieprodcode.c \ 21079629b1aSNicolas Le Bayon drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_mapdrvstren.c \ 21179629b1aSNicolas Le Bayon drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_progcsrskiptrain.c \ 21279629b1aSNicolas Le Bayon drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_reginterface.c \ 21379629b1aSNicolas Le Bayon drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_restore_sequence.c \ 21479629b1aSNicolas Le Bayon drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_sequence.c \ 21579629b1aSNicolas Le Bayon drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_softsetmb.c \ 21679629b1aSNicolas Le Bayon drivers/st/ddr/phy/phyinit/usercustom/ddrphy_phyinit_usercustom_custompretrain.c \ 21779629b1aSNicolas Le Bayon drivers/st/ddr/phy/phyinit/usercustom/ddrphy_phyinit_usercustom_saveretregs.c 21879629b1aSNicolas Le Bayon 21979629b1aSNicolas Le BayonBL2_SOURCES += drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_d_loadimem.c \ 22079629b1aSNicolas Le Bayon drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_f_loaddmem.c \ 22179629b1aSNicolas Le Bayon drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_g_execfw.c \ 22279629b1aSNicolas Le Bayon drivers/st/ddr/phy/phyinit/src/ddrphy_phyinit_writeoutmem.c \ 22379629b1aSNicolas Le Bayon drivers/st/ddr/phy/phyinit/usercustom/ddrphy_phyinit_usercustom_g_waitfwdone.c 2245e0be8c0SYann Gautier 22503020b66SYann Gautier# BL31 sources 22603020b66SYann GautierBL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 22703020b66SYann Gautier 22803020b66SYann GautierBL31_SOURCES += plat/st/stm32mp2/bl31_plat_setup.c \ 22903020b66SYann Gautier plat/st/stm32mp2/stm32mp2_pm.c \ 23003020b66SYann Gautier plat/st/stm32mp2/stm32mp2_topology.c 23103020b66SYann Gautier# Generic GIC v2 23203020b66SYann Gautierinclude drivers/arm/gic/v2/gicv2.mk 23303020b66SYann Gautier 23403020b66SYann GautierBL31_SOURCES += ${GICV2_SOURCES} \ 23503020b66SYann Gautier plat/common/plat_gicv2.c \ 23603020b66SYann Gautier plat/st/common/stm32mp_gic.c 23703020b66SYann Gautier 23803020b66SYann Gautier# Generic PSCI 23903020b66SYann GautierBL31_SOURCES += plat/common/plat_psci_common.c 24003020b66SYann Gautier 241f55b136aSGatien ChevallierBL31_SOURCES += plat/st/common/stm32mp_svc_setup.c \ 2427f41506fSGatien Chevallier plat/st/stm32mp2/services/stgen_svc.c \ 243f55b136aSGatien Chevallier plat/st/stm32mp2/services/stm32mp2_svc_setup.c 244f55b136aSGatien Chevallier 245f55b136aSGatien Chevallier# Arm Archtecture services 246f55b136aSGatien ChevallierBL31_SOURCES += services/arm_arch_svc/arm_arch_svc_setup.c 247f55b136aSGatien Chevallier 248db77f8bfSYann Gautier# Compilation rules 249d07e9467SNicolas Le Bayon.PHONY: check_ddr_type 250d07e9467SNicolas Le Bayonbl2: check_ddr_type 251d07e9467SNicolas Le Bayon 252d07e9467SNicolas Le Bayoncheck_ddr_type: 253d07e9467SNicolas Le Bayon $(eval DDR_TYPE = $(shell echo $$(($(STM32MP_DDR3_TYPE) + \ 254d07e9467SNicolas Le Bayon $(STM32MP_DDR4_TYPE) + \ 255d07e9467SNicolas Le Bayon $(STM32MP_LPDDR4_TYPE))))) 256d07e9467SNicolas Le Bayon @if [ ${DDR_TYPE} != 1 ]; then \ 257d07e9467SNicolas Le Bayon echo "One and only one DDR type must be defined"; \ 258d07e9467SNicolas Le Bayon false; \ 259d07e9467SNicolas Le Bayon fi 260d07e9467SNicolas Le Bayon 26127dd11dbSMaxime Méré# Create DTB file for BL31 26227dd11dbSMaxime Méré${BUILD_PLAT}/fdts/%-bl31.dts: fdts/%.dts fdts/${BL31_DTSI} | $$(@D)/ 26327dd11dbSMaxime Méré @echo '#include "$(patsubst fdts/%,%,$<)"' > $@ 26427dd11dbSMaxime Méré @echo '#include "${BL31_DTSI}"' >> $@ 26527dd11dbSMaxime Méré 26635527fb4SYann Gautierinclude plat/st/common/common_rules.mk 267