1*beb625f9SLionel Debieve /* 2*beb625f9SLionel Debieve * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved. 3*beb625f9SLionel Debieve * 4*beb625f9SLionel Debieve * SPDX-License-Identifier: BSD-3-Clause 5*beb625f9SLionel Debieve */ 6*beb625f9SLionel Debieve 7*beb625f9SLionel Debieve #include "tbbr/tbb_ext.h" 8*beb625f9SLionel Debieve #include "tbbr/tbb_key.h" 9*beb625f9SLionel Debieve 10*beb625f9SLionel Debieve #include "tbbr/stm32mp1_tbb_cert.h" 11*beb625f9SLionel Debieve 12*beb625f9SLionel Debieve /* 13*beb625f9SLionel Debieve * Certificates used in the chain of trust 14*beb625f9SLionel Debieve * 15*beb625f9SLionel Debieve * The order of the certificates must follow the enumeration specified in 16*beb625f9SLionel Debieve * stm32mp1_tbb_cert.h. All certificates are self-signed, so the issuer certificate 17*beb625f9SLionel Debieve * field points to itself. 18*beb625f9SLionel Debieve */ 19*beb625f9SLionel Debieve static cert_t stm32mp1_tbb_certs[] = { 20*beb625f9SLionel Debieve [0] = { 21*beb625f9SLionel Debieve .id = STM32MP_CONFIG_CERT, 22*beb625f9SLionel Debieve .opt = "stm32mp-cfg-cert", 23*beb625f9SLionel Debieve .help_msg = "STM32MP Config Certificate (output file)", 24*beb625f9SLionel Debieve .fn = NULL, 25*beb625f9SLionel Debieve .cn = "STM32MP config FW Certificate", 26*beb625f9SLionel Debieve .key = ROT_KEY, 27*beb625f9SLionel Debieve .issuer = STM32MP_CONFIG_CERT, 28*beb625f9SLionel Debieve .ext = { 29*beb625f9SLionel Debieve TRUSTED_FW_NVCOUNTER_EXT, 30*beb625f9SLionel Debieve HW_CONFIG_HASH_EXT, 31*beb625f9SLionel Debieve FW_CONFIG_HASH_EXT 32*beb625f9SLionel Debieve }, 33*beb625f9SLionel Debieve .num_ext = 3 34*beb625f9SLionel Debieve }, 35*beb625f9SLionel Debieve }; 36*beb625f9SLionel Debieve 37*beb625f9SLionel Debieve PLAT_REGISTER_COT(stm32mp1_tbb_certs); 38