1c9d75b3cSYann Gautier /* 2c9d75b3cSYann Gautier * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. 3c9d75b3cSYann Gautier * 4c9d75b3cSYann Gautier * SPDX-License-Identifier: BSD-3-Clause 5c9d75b3cSYann Gautier */ 6c9d75b3cSYann Gautier 7*8f282daeSYann Gautier #include <assert.h> 8*8f282daeSYann Gautier 9c9d75b3cSYann Gautier #include <platform_def.h> 10c9d75b3cSYann Gautier 11c9d75b3cSYann Gautier #include <lib/xlat_tables/xlat_tables_v2.h> 12c9d75b3cSYann Gautier 133f9c9784SYann Gautier #define MAP_SRAM MAP_REGION_FLAT(STM32MP_SYSRAM_BASE, \ 143f9c9784SYann Gautier STM32MP_SYSRAM_SIZE, \ 15c9d75b3cSYann Gautier MT_MEMORY | \ 16c9d75b3cSYann Gautier MT_RW | \ 17c9d75b3cSYann Gautier MT_SECURE | \ 18c9d75b3cSYann Gautier MT_EXECUTE_NEVER) 19c9d75b3cSYann Gautier 20c9d75b3cSYann Gautier #define MAP_DEVICE1 MAP_REGION_FLAT(STM32MP1_DEVICE1_BASE, \ 21c9d75b3cSYann Gautier STM32MP1_DEVICE1_SIZE, \ 22c9d75b3cSYann Gautier MT_DEVICE | \ 23c9d75b3cSYann Gautier MT_RW | \ 24c9d75b3cSYann Gautier MT_SECURE | \ 25c9d75b3cSYann Gautier MT_EXECUTE_NEVER) 26c9d75b3cSYann Gautier 27c9d75b3cSYann Gautier #define MAP_DEVICE2 MAP_REGION_FLAT(STM32MP1_DEVICE2_BASE, \ 28c9d75b3cSYann Gautier STM32MP1_DEVICE2_SIZE, \ 29c9d75b3cSYann Gautier MT_DEVICE | \ 30c9d75b3cSYann Gautier MT_RW | \ 31c9d75b3cSYann Gautier MT_SECURE | \ 32c9d75b3cSYann Gautier MT_EXECUTE_NEVER) 33c9d75b3cSYann Gautier 34c9d75b3cSYann Gautier #if defined(IMAGE_BL2) 35c9d75b3cSYann Gautier static const mmap_region_t stm32mp1_mmap[] = { 36c9d75b3cSYann Gautier MAP_SRAM, 37c9d75b3cSYann Gautier MAP_DEVICE1, 38c9d75b3cSYann Gautier MAP_DEVICE2, 39c9d75b3cSYann Gautier {0} 40c9d75b3cSYann Gautier }; 41c9d75b3cSYann Gautier #endif 42c9d75b3cSYann Gautier #if defined(IMAGE_BL32) 43c9d75b3cSYann Gautier static const mmap_region_t stm32mp1_mmap[] = { 44c9d75b3cSYann Gautier MAP_SRAM, 45c9d75b3cSYann Gautier MAP_DEVICE1, 46c9d75b3cSYann Gautier MAP_DEVICE2, 47c9d75b3cSYann Gautier {0} 48c9d75b3cSYann Gautier }; 49c9d75b3cSYann Gautier #endif 50c9d75b3cSYann Gautier 51c9d75b3cSYann Gautier void configure_mmu(void) 52c9d75b3cSYann Gautier { 53c9d75b3cSYann Gautier mmap_add(stm32mp1_mmap); 54c9d75b3cSYann Gautier init_xlat_tables(); 55c9d75b3cSYann Gautier 56c9d75b3cSYann Gautier enable_mmu_svc_mon(0); 57c9d75b3cSYann Gautier } 58*8f282daeSYann Gautier 59*8f282daeSYann Gautier unsigned long stm32_get_gpio_bank_clock(unsigned int bank) 60*8f282daeSYann Gautier { 61*8f282daeSYann Gautier if (bank == GPIO_BANK_Z) { 62*8f282daeSYann Gautier return GPIOZ; 63*8f282daeSYann Gautier } 64*8f282daeSYann Gautier 65*8f282daeSYann Gautier assert(GPIO_BANK_A == 0 && bank <= GPIO_BANK_K); 66*8f282daeSYann Gautier 67*8f282daeSYann Gautier return GPIOA + (bank - GPIO_BANK_A); 68*8f282daeSYann Gautier } 69