1*4353bb20SYann Gautier/* 2*4353bb20SYann Gautier * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. 3*4353bb20SYann Gautier * 4*4353bb20SYann Gautier * SPDX-License-Identifier: BSD-3-Clause 5*4353bb20SYann Gautier */ 6*4353bb20SYann Gautier 7*4353bb20SYann Gautier#include <arch.h> 8*4353bb20SYann Gautier#include <asm_macros.S> 9*4353bb20SYann Gautier#include <bl_common.h> 10*4353bb20SYann Gautier#include <platform_def.h> 11*4353bb20SYann Gautier 12*4353bb20SYann Gautier .globl platform_mem_init 13*4353bb20SYann Gautier .globl plat_report_exception 14*4353bb20SYann Gautier .globl plat_get_my_entrypoint 15*4353bb20SYann Gautier .globl plat_secondary_cold_boot_setup 16*4353bb20SYann Gautier .globl plat_reset_handler 17*4353bb20SYann Gautier .globl plat_is_my_cpu_primary 18*4353bb20SYann Gautier .globl plat_my_core_pos 19*4353bb20SYann Gautier .globl plat_panic_handler 20*4353bb20SYann Gautier 21*4353bb20SYann Gautierfunc platform_mem_init 22*4353bb20SYann Gautier /* Nothing to do, don't need to init SYSRAM */ 23*4353bb20SYann Gautier bx lr 24*4353bb20SYann Gautierendfunc platform_mem_init 25*4353bb20SYann Gautier 26*4353bb20SYann Gautierfunc plat_report_exception 27*4353bb20SYann Gautier bx lr 28*4353bb20SYann Gautierendfunc plat_report_exception 29*4353bb20SYann Gautier 30*4353bb20SYann Gautierfunc plat_reset_handler 31*4353bb20SYann Gautier bx lr 32*4353bb20SYann Gautierendfunc plat_reset_handler 33*4353bb20SYann Gautier 34*4353bb20SYann Gautier /* ------------------------------------------------------------------ 35*4353bb20SYann Gautier * unsigned long plat_get_my_entrypoint (void); 36*4353bb20SYann Gautier * 37*4353bb20SYann Gautier * Main job of this routine is to distinguish between a cold and warm 38*4353bb20SYann Gautier * boot. 39*4353bb20SYann Gautier * 40*4353bb20SYann Gautier * Currently supports only cold boot 41*4353bb20SYann Gautier * ------------------------------------------------------------------ 42*4353bb20SYann Gautier */ 43*4353bb20SYann Gautierfunc plat_get_my_entrypoint 44*4353bb20SYann Gautier mov r0, #0 45*4353bb20SYann Gautier bx lr 46*4353bb20SYann Gautierendfunc plat_get_my_entrypoint 47*4353bb20SYann Gautier 48*4353bb20SYann Gautier /* --------------------------------------------- 49*4353bb20SYann Gautier * void plat_secondary_cold_boot_setup (void); 50*4353bb20SYann Gautier * 51*4353bb20SYann Gautier * Cold-booting secondary CPUs is not supported. 52*4353bb20SYann Gautier * --------------------------------------------- 53*4353bb20SYann Gautier */ 54*4353bb20SYann Gautierfunc plat_secondary_cold_boot_setup 55*4353bb20SYann Gautier b . 56*4353bb20SYann Gautierendfunc plat_secondary_cold_boot_setup 57*4353bb20SYann Gautier 58*4353bb20SYann Gautier /* ----------------------------------------------------- 59*4353bb20SYann Gautier * unsigned int plat_is_my_cpu_primary (void); 60*4353bb20SYann Gautier * 61*4353bb20SYann Gautier * Find out whether the current cpu is the primary cpu. 62*4353bb20SYann Gautier * ----------------------------------------------------- 63*4353bb20SYann Gautier */ 64*4353bb20SYann Gautierfunc plat_is_my_cpu_primary 65*4353bb20SYann Gautier ldcopr r0, MPIDR 66*4353bb20SYann Gautier ldr r1, =(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK) 67*4353bb20SYann Gautier and r0, r1 68*4353bb20SYann Gautier cmp r0, #STM32MP1_PRIMARY_CPU 69*4353bb20SYann Gautier moveq r0, #1 70*4353bb20SYann Gautier movne r0, #0 71*4353bb20SYann Gautier bx lr 72*4353bb20SYann Gautierendfunc plat_is_my_cpu_primary 73*4353bb20SYann Gautier 74*4353bb20SYann Gautier /* ------------------------------------------- 75*4353bb20SYann Gautier * int plat_stm32mp1_get_core_pos(int mpidr); 76*4353bb20SYann Gautier * 77*4353bb20SYann Gautier * Return CorePos = (ClusterId * 4) + CoreId 78*4353bb20SYann Gautier * ------------------------------------------- 79*4353bb20SYann Gautier */ 80*4353bb20SYann Gautierfunc plat_stm32mp1_get_core_pos 81*4353bb20SYann Gautier and r1, r0, #MPIDR_CPU_MASK 82*4353bb20SYann Gautier and r0, r0, #MPIDR_CLUSTER_MASK 83*4353bb20SYann Gautier add r0, r1, r0, LSR #6 84*4353bb20SYann Gautier bx lr 85*4353bb20SYann Gautierendfunc plat_stm32mp1_get_core_pos 86*4353bb20SYann Gautier 87*4353bb20SYann Gautier /* ------------------------------------ 88*4353bb20SYann Gautier * unsigned int plat_my_core_pos(void) 89*4353bb20SYann Gautier * ------------------------------------ 90*4353bb20SYann Gautier */ 91*4353bb20SYann Gautierfunc plat_my_core_pos 92*4353bb20SYann Gautier ldcopr r0, MPIDR 93*4353bb20SYann Gautier b plat_stm32mp1_get_core_pos 94*4353bb20SYann Gautierendfunc plat_my_core_pos 95