1/* 2 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7#ifndef STM32MP1_LD_S 8#define STM32MP1_LD_S 9 10#include <lib/xlat_tables/xlat_tables_defs.h> 11#include <platform_def.h> 12 13OUTPUT_FORMAT(PLATFORM_LINKER_FORMAT) 14OUTPUT_ARCH(PLATFORM_LINKER_ARCH) 15 16ENTRY(__BL2_IMAGE_START__) 17 18MEMORY { 19 HEADER (rw) : ORIGIN = 0x00000000, LENGTH = 0x3000 20 RAM (rwx) : ORIGIN = STM32MP1_BINARY_BASE, LENGTH = STM32MP1_BINARY_SIZE 21} 22 23SECTIONS 24{ 25 /* 26 * TF mapping must conform to ROM code specification. 27 */ 28 .header : { 29 __HEADER_START__ = .; 30 KEEP(*(.header)) 31 . = ALIGN(4); 32 __HEADER_END__ = .; 33 } >HEADER 34 35 . = STM32MP1_BINARY_BASE; 36 .data . : { 37 . = ALIGN(PAGE_SIZE); 38 __DATA_START__ = .; 39 *(.data*) 40 41 /* 42 * dtb. 43 * The strongest and only alignment contraint is MMU 4K page. 44 * Indeed as images below will be removed, 4K pages will be re-used. 45 */ 46 . = ( STM32MP1_DTB_BASE - STM32MP1_BINARY_BASE ); 47 __DTB_IMAGE_START__ = .; 48 *(.dtb_image*) 49 __DTB_IMAGE_END__ = .; 50 51 /* 52 * bl2. 53 * The strongest and only alignment contraint is MMU 4K page. 54 * Indeed as images below will be removed, 4K pages will be re-used. 55 */ 56 . = ( STM32MP1_BL2_BASE - STM32MP1_BINARY_BASE ); 57 __BL2_IMAGE_START__ = .; 58 *(.bl2_image*) 59 __BL2_IMAGE_END__ = .; 60 61 /* 62 * bl32 will be settled by bl2. 63 * The strongest and only alignment constraint is 8 words to simplify 64 * memraise8 assembly code. 65 */ 66 . = ( STM32MP1_BL32_BASE - STM32MP1_BINARY_BASE ); 67 __BL32_IMAGE_START__ = .; 68 *(.bl32_image*) 69 __BL32_IMAGE_END__ = .; 70 71 __DATA_END__ = .; 72 } >RAM 73 74 __TF_END__ = .; 75 76} 77#endif /* STM32MP1_LD_S */ 78