1/* 2 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7#ifndef __STM32MP1_LD_S__ 8#define __STM32MP1_LD_S__ 9#include <platform_def.h> 10#include <xlat_tables_defs.h> 11 12OUTPUT_FORMAT(PLATFORM_LINKER_FORMAT) 13OUTPUT_ARCH(PLATFORM_LINKER_ARCH) 14 15ENTRY(__BL2_IMAGE_START__) 16 17MEMORY { 18 HEADER (rw) : ORIGIN = 0x00000000, LENGTH = 0x3000 19 RAM (rwx) : ORIGIN = STM32MP1_BINARY_BASE, LENGTH = STM32MP1_BINARY_SIZE 20} 21 22SECTIONS 23{ 24 /* 25 * TF mapping must conform to ROM code specification. 26 */ 27 .header : { 28 __HEADER_START__ = .; 29 KEEP(*(.header)) 30 . = ALIGN(4); 31 __HEADER_END__ = .; 32 } >HEADER 33 34 . = STM32MP1_BINARY_BASE; 35 .data . : { 36 . = ALIGN(PAGE_SIZE); 37 __DATA_START__ = .; 38 *(.data*) 39 40 /* 41 * dtb. 42 * The strongest and only alignment contraint is MMU 4K page. 43 * Indeed as images below will be removed, 4K pages will be re-used. 44 */ 45 . = ( STM32MP1_DTB_BASE - STM32MP1_BINARY_BASE ); 46 __DTB_IMAGE_START__ = .; 47 *(.dtb_image*) 48 __DTB_IMAGE_END__ = .; 49 50 /* 51 * bl2. 52 * The strongest and only alignment contraint is MMU 4K page. 53 * Indeed as images below will be removed, 4K pages will be re-used. 54 */ 55 . = ( STM32MP1_BL2_BASE - STM32MP1_BINARY_BASE ); 56 __BL2_IMAGE_START__ = .; 57 *(.bl2_image*) 58 __BL2_IMAGE_END__ = .; 59 60 /* 61 * bl32 will be settled by bl2. 62 * The strongest and only alignment constraint is 8 words to simplify 63 * memraise8 assembly code. 64 */ 65 . = ( STM32MP1_BL32_BASE - STM32MP1_BINARY_BASE ); 66 __BL32_IMAGE_START__ = .; 67 *(.bl32_image*) 68 __BL32_IMAGE_END__ = .; 69 70 __DATA_END__ = .; 71 } >RAM 72 73 __TF_END__ = .; 74 75} 76#endif /*__STM32MP1_LD_S__*/ 77