xref: /rk3399_ARM-atf/plat/st/stm32mp1/services/bsec_svc.c (revision 072d7532d2cd3d004a7cc09fd15e9543d0a3bbb7)
1c7ba52daSYann Gautier /*
2*072d7532SNicolas Le Bayon  * Copyright (c) 2016-2022, STMicroelectronics - All Rights Reserved
3c7ba52daSYann Gautier  *
4c7ba52daSYann Gautier  * SPDX-License-Identifier: BSD-3-Clause
5c7ba52daSYann Gautier  */
6c7ba52daSYann Gautier 
7c7ba52daSYann Gautier #include <platform_def.h>
8c7ba52daSYann Gautier 
9c7ba52daSYann Gautier #include <common/debug.h>
10c7ba52daSYann Gautier #include <drivers/st/bsec.h>
11*072d7532SNicolas Le Bayon #include <drivers/st/bsec2_reg.h>
12c7ba52daSYann Gautier 
13c7ba52daSYann Gautier #include <stm32mp1_smc.h>
14c7ba52daSYann Gautier 
15c7ba52daSYann Gautier #include "bsec_svc.h"
16c7ba52daSYann Gautier 
17c7ba52daSYann Gautier uint32_t bsec_main(uint32_t x1, uint32_t x2, uint32_t x3,
18c7ba52daSYann Gautier 		   uint32_t *ret_otp_value)
19c7ba52daSYann Gautier {
20c7ba52daSYann Gautier 	uint32_t result;
21c7ba52daSYann Gautier 	uint32_t tmp_data = 0U;
22c7ba52daSYann Gautier 
23c7ba52daSYann Gautier 	switch (x1) {
24c7ba52daSYann Gautier 	case STM32_SMC_READ_SHADOW:
25c7ba52daSYann Gautier 		result = bsec_read_otp(ret_otp_value, x2);
26c7ba52daSYann Gautier 		break;
27c7ba52daSYann Gautier 	case STM32_SMC_PROG_OTP:
28c7ba52daSYann Gautier 		*ret_otp_value = 0U;
29c7ba52daSYann Gautier 		result = bsec_program_otp(x3, x2);
30c7ba52daSYann Gautier 		break;
31c7ba52daSYann Gautier 	case STM32_SMC_WRITE_SHADOW:
3272c78840SNicolas Le Bayon 		*ret_otp_value = 0U;
33c7ba52daSYann Gautier 		result = bsec_write_otp(x3, x2);
34c7ba52daSYann Gautier 		break;
35c7ba52daSYann Gautier 	case STM32_SMC_READ_OTP:
3672c78840SNicolas Le Bayon 		*ret_otp_value = 0U;
37c7ba52daSYann Gautier 		result = bsec_read_otp(&tmp_data, x2);
38c7ba52daSYann Gautier 		if (result != BSEC_OK) {
39c7ba52daSYann Gautier 			break;
40c7ba52daSYann Gautier 		}
41c7ba52daSYann Gautier 
42c7ba52daSYann Gautier 		result = bsec_shadow_register(x2);
43c7ba52daSYann Gautier 		if (result != BSEC_OK) {
44c7ba52daSYann Gautier 			break;
45c7ba52daSYann Gautier 		}
46c7ba52daSYann Gautier 
47c7ba52daSYann Gautier 		result = bsec_read_otp(ret_otp_value, x2);
48c7ba52daSYann Gautier 		if (result != BSEC_OK) {
49c7ba52daSYann Gautier 			break;
50c7ba52daSYann Gautier 		}
51c7ba52daSYann Gautier 
52c7ba52daSYann Gautier 		result = bsec_write_otp(tmp_data, x2);
53c7ba52daSYann Gautier 		break;
54c7ba52daSYann Gautier 
55c7ba52daSYann Gautier 	default:
5672c78840SNicolas Le Bayon 		return STM32_SMC_INVALID_PARAMS;
57c7ba52daSYann Gautier 	}
58c7ba52daSYann Gautier 
5972c78840SNicolas Le Bayon 	return (result == BSEC_OK) ? STM32_SMC_OK : STM32_SMC_FAILED;
60c7ba52daSYann Gautier }
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