xref: /rk3399_ARM-atf/plat/st/stm32mp1/platform.mk (revision 63900851d7d6009950b2fdb53e9456cc0a0bc025)
1#
2# Copyright (c) 2015-2025, Arm Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7# Extra partitions used to find FIP, contains:
8# metadata (2) and the FIP partitions (default is 2).
9STM32_EXTRA_PARTS	:=	4
10
11include plat/st/common/common.mk
12
13ARM_CORTEX_A7		:=	yes
14ARM_WITH_NEON		:=	yes
15USE_COHERENT_MEM	:=	0
16
17# Default Device tree
18DTB_FILE_NAME		?=	stm32mp157c-ev1.dtb
19
20TF_CFLAGS 		+=	-DSTM32MP1X
21
22STM32MP13		?=	0
23STM32MP15		?=	0
24
25ifeq ($(STM32MP13),1)
26ifeq ($(STM32MP15),1)
27$(error Cannot enable both flags STM32MP13 and STM32MP15)
28endif
29STM32MP13		:=	1
30STM32MP15		:=	0
31else ifeq ($(STM32MP15),1)
32STM32MP13		:=	0
33STM32MP15		:=	1
34else ifneq ($(findstring stm32mp13,$(DTB_FILE_NAME)),)
35STM32MP13		:=	1
36STM32MP15		:=	0
37else ifneq ($(findstring stm32mp15,$(DTB_FILE_NAME)),)
38STM32MP13		:=	0
39STM32MP15		:=	1
40endif
41
42ifeq ($(STM32MP13),1)
43# Will use SRAM2 as mbedtls heap
44STM32MP_USE_EXTERNAL_HEAP :=	1
45
46# DDR controller with single AXI port and 16-bit interface
47STM32MP_DDR_DUAL_AXI_PORT:=	0
48STM32MP_DDR_32BIT_INTERFACE:=	0
49
50ifeq (${TRUSTED_BOARD_BOOT},1)
51# PKA algo to include
52PKA_USE_NIST_P256	:=	1
53PKA_USE_BRAINPOOL_P256T1:=	1
54endif
55
56# STM32 image header version v2.0
57STM32_HEADER_VERSION_MAJOR:=	2
58STM32_HEADER_VERSION_MINOR:=	0
59endif
60
61ifeq ($(STM32MP15),1)
62# DDR controller with dual AXI port and 32-bit interface
63STM32MP_DDR_DUAL_AXI_PORT:=	1
64STM32MP_DDR_32BIT_INTERFACE:=	1
65
66# STM32 image header version v1.0
67STM32_HEADER_VERSION_MAJOR:=	1
68STM32_HEADER_VERSION_MINOR:=	0
69STM32MP_CRYPTO_ROM_LIB :=	1
70
71# Decryption support
72ifneq ($(DECRYPTION_SUPPORT),none)
73$(error "DECRYPTION_SUPPORT not supported on STM32MP15")
74endif
75endif
76
77PKA_USE_NIST_P256	?=	0
78PKA_USE_BRAINPOOL_P256T1 ?=	0
79
80ifeq ($(AARCH32_SP),sp_min)
81# Disable Neon support: sp_min runtime may conflict with non-secure world
82TF_CFLAGS		+=	-mfloat-abi=soft
83endif
84
85# Not needed for Cortex-A7
86WORKAROUND_CVE_2017_5715:=	0
87WORKAROUND_CVE_2022_23960:=	0
88
89ifeq ($(STM32MP13),1)
90STM32_HASH_VER		:=	4
91STM32_RNG_VER		:=	4
92STM32_RNG_VER_MINOR	:=	2
93else # Assuming STM32MP15
94STM32_HASH_VER		:=	2
95STM32_RNG_VER		:=	2
96STM32_RNG_VER_MINOR	:=	1
97endif
98
99# Download load address for serial boot devices
100DWL_BUFFER_BASE 	?=	0xC7000000
101
102# Device tree
103ifeq ($(STM32MP13),1)
104BL2_DTSI		:=	stm32mp13-bl2.dtsi
105FDT_SOURCES		:=	$(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl2.dts,$(DTB_FILE_NAME)))
106else
107BL2_DTSI		:=	stm32mp15-bl2.dtsi
108FDT_SOURCES		:=	$(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl2.dts,$(DTB_FILE_NAME)))
109ifeq ($(AARCH32_SP),sp_min)
110BL32_DTSI		:=	stm32mp15-bl32.dtsi
111FDT_SOURCES		+=	$(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl32.dts,$(DTB_FILE_NAME)))
112ifneq (,$(wildcard $(patsubst %.dtb,fdts/%-sp_min.dts,$(DTB_FILE_NAME))))
113ifeq (,$(findstring -sp_min,$(DTB_FILE_NAME)))
114SP_EXT			:=	-sp_min
115endif
116endif
117endif
118endif
119
120# Macros and rules to build TF binary
121STM32_TF_STM32		:=	$(addprefix ${BUILD_PLAT}/tf-a-, $(patsubst %.dtb,%.stm32,$(DTB_FILE_NAME)))
122STM32_LD_FILE		:=	plat/st/stm32mp1/stm32mp1.ld.S
123STM32_BINARY_MAPPING	:=	plat/st/stm32mp1/stm32mp1.S
124
125ifeq ($(AARCH32_SP),sp_min)
126# BL32 is built only if using SP_MIN
127BL32_DEP		:= bl32
128ASFLAGS			+= -DBL32_BIN_PATH=\"${BUILD_PLAT}/bl32.bin\"
129endif
130
131STM32MP_FW_CONFIG_NAME	:=	$(patsubst %.dtb,%-fw-config.dtb,$(DTB_FILE_NAME))
132STM32MP_FW_CONFIG	:=	${BUILD_PLAT}/fdts/$(STM32MP_FW_CONFIG_NAME)
133ifneq (${AARCH32_SP},none)
134FDT_SOURCES		+=	$(addprefix fdts/, $(patsubst %.dtb,%.dts,$(STM32MP_FW_CONFIG_NAME)))
135endif
136# Add the FW_CONFIG to FIP and specify the same to certtool
137$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_FW_CONFIG},--fw-config))
138ifeq ($(GENERATE_COT),1)
139STM32MP_CFG_CERT	:=	$(BUILD_PLAT)/stm32mp_cfg_cert.crt
140# Add the STM32MP_CFG_CERT to FIP and specify the same to certtool
141$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_CFG_CERT},--stm32mp-cfg-cert))
142endif
143ifeq ($(AARCH32_SP),sp_min)
144STM32MP_TOS_FW_CONFIG	:= $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl32.dtb,$(DTB_FILE_NAME)))
145$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_TOS_FW_CONFIG},--tos-fw-config))
146endif
147
148# Enable flags for C files
149$(eval $(call assert_booleans,\
150	$(sort \
151		PKA_USE_BRAINPOOL_P256T1 \
152		PKA_USE_NIST_P256 \
153		STM32MP_CRYPTO_ROM_LIB \
154		STM32MP_DDR_32BIT_INTERFACE \
155		STM32MP_DDR_DUAL_AXI_PORT \
156		STM32MP_USE_EXTERNAL_HEAP \
157		STM32MP13 \
158		STM32MP15 \
159)))
160
161$(eval $(call assert_numerics,\
162	$(sort \
163		PLAT_PARTITION_MAX_ENTRIES \
164		STM32_HASH_VER \
165		STM32_HEADER_VERSION_MAJOR \
166		STM32_RNG_VER \
167		STM32_RNG_VER_MINOR \
168		STM32_TF_A_COPIES \
169)))
170
171$(eval $(call add_defines,\
172	$(sort \
173		DWL_BUFFER_BASE \
174		PKA_USE_BRAINPOOL_P256T1 \
175		PKA_USE_NIST_P256 \
176		PLAT_PARTITION_MAX_ENTRIES \
177		PLAT_TBBR_IMG_DEF \
178		STM32_HASH_VER \
179		STM32_HEADER_VERSION_MAJOR \
180		STM32_RNG_VER \
181		STM32_RNG_VER_MINOR \
182		STM32_TF_A_COPIES \
183		STM32MP_CRYPTO_ROM_LIB \
184		STM32MP_DDR_32BIT_INTERFACE \
185		STM32MP_DDR_DUAL_AXI_PORT \
186		STM32MP_USE_EXTERNAL_HEAP \
187		STM32MP13 \
188		STM32MP15 \
189)))
190
191# Include paths and source files
192PLAT_INCLUDES		+=	-Iplat/st/stm32mp1/include/
193
194PLAT_BL_COMMON_SOURCES	+=	plat/st/stm32mp1/stm32mp1_private.c
195
196PLAT_BL_COMMON_SOURCES	+=	drivers/st/uart/aarch32/stm32_console.S
197
198ifneq (${ENABLE_STACK_PROTECTOR},0)
199PLAT_BL_COMMON_SOURCES	+=	plat/st/stm32mp1/stm32mp1_stack_protector.c
200endif
201
202PLAT_BL_COMMON_SOURCES	+=	lib/cpus/aarch32/cortex_a7.S
203
204PLAT_BL_COMMON_SOURCES	+=	drivers/arm/tzc/tzc400.c				\
205				drivers/st/bsec/bsec2.c					\
206				drivers/st/ddr/stm32mp1_ddr_helpers.c			\
207				drivers/st/i2c/stm32_i2c.c				\
208				drivers/st/iwdg/stm32_iwdg.c				\
209				drivers/st/pmic/stm32mp_pmic.c				\
210				drivers/st/pmic/stpmic1.c				\
211				drivers/st/reset/stm32mp1_reset.c			\
212				plat/st/stm32mp1/stm32mp1_dbgmcu.c			\
213				plat/st/stm32mp1/stm32mp1_helper.S			\
214				plat/st/stm32mp1/stm32mp1_syscfg.c
215
216ifeq ($(STM32MP13),1)
217PLAT_BL_COMMON_SOURCES	+=	drivers/st/clk/clk-stm32-core.c				\
218				drivers/st/clk/clk-stm32mp13.c				\
219				drivers/st/crypto/stm32_rng.c
220else
221PLAT_BL_COMMON_SOURCES	+=	drivers/st/clk/stm32mp1_clk.c
222endif
223
224BL2_SOURCES		+=	plat/st/stm32mp1/plat_bl2_mem_params_desc.c		\
225				plat/st/stm32mp1/stm32mp1_fconf_firewall.c
226
227BL2_SOURCES		+=	drivers/st/crypto/stm32_hash.c				\
228				plat/st/stm32mp1/bl2_plat_setup.c
229
230ifeq ($(STM32MP13),1)
231BL2_SOURCES		+=	drivers/st/mce/stm32_mce.c
232endif
233
234ifeq (${TRUSTED_BOARD_BOOT},1)
235ifeq ($(STM32MP13),1)
236BL2_SOURCES		+=	drivers/st/crypto/stm32_pka.c
237BL2_SOURCES		+=	drivers/st/crypto/stm32_saes.c
238endif
239endif
240
241ifneq ($(filter 1,${STM32MP_EMMC} ${STM32MP_SDMMC}),)
242BL2_SOURCES		+=	drivers/st/mmc/stm32_sdmmc2.c
243endif
244
245ifeq (${STM32MP_RAW_NAND},1)
246BL2_SOURCES		+=	drivers/st/fmc/stm32_fmc2_nand.c
247endif
248
249ifneq ($(filter 1,${STM32MP_SPI_NAND} ${STM32MP_SPI_NOR}),)
250BL2_SOURCES		+=	drivers/st/spi/stm32_qspi.c
251endif
252
253ifneq ($(filter 1,${STM32MP_RAW_NAND} ${STM32MP_SPI_NAND} ${STM32MP_SPI_NOR}),)
254BL2_SOURCES		+=	plat/st/stm32mp1/stm32mp1_boot_device.c
255endif
256
257ifeq (${STM32MP_UART_PROGRAMMER},1)
258BL2_SOURCES		+=	drivers/st/uart/stm32_uart.c
259endif
260
261ifeq (${STM32MP_USB_PROGRAMMER},1)
262#The DFU stack uses only one end point, reduce the USB stack footprint
263$(eval $(call add_define_val,CONFIG_USBD_EP_NB,1U))
264BL2_SOURCES		+=	drivers/st/usb/stm32mp1_usb.c				\
265				plat/st/stm32mp1/stm32mp1_usb_dfu.c
266endif
267
268BL2_SOURCES		+=	drivers/st/ddr/stm32mp1_ddr.c				\
269				drivers/st/ddr/stm32mp1_ram.c
270
271BL2_SOURCES		+=	plat/st/stm32mp1/plat_ddr.c
272
273ifeq ($(AARCH32_SP),sp_min)
274# Create DTB file for BL32
275${BUILD_PLAT}/fdts/%-bl32.dts: fdts/%.dts fdts/${BL32_DTSI} | $$(@D)/
276	$(q)echo '#include "$(patsubst %.dts,%$(SP_EXT).dts,$(patsubst fdts/%,%,$<))"' > $@
277	$(q)echo '#include "${BL32_DTSI}"' >> $@
278
279${BUILD_PLAT}/fdts/%-bl32.dtb: ${BUILD_PLAT}/fdts/%-bl32.dts | $$(@D)/
280endif
281
282include plat/st/common/common_rules.mk
283